// Copyright 2014 Google Inc. All Rights Reserved. // // Use of this source code is governed by a BSD-style license // that can be found in the COPYING file in the root of the source // tree. An additional intellectual property rights grant can be found // in the file PATENTS. All contributing project authors may // be found in the AUTHORS file in the root of the source tree. // ----------------------------------------------------------------------------- // // MIPS version of speed-critical encoding functions. // // Author(s): Djordje Pesut ([email protected]) // Jovan Zelincevic ([email protected]) // Slobodan Prijic ([email protected]) #include "src/dsp/dsp.h" #if defined(WEBP_USE_MIPS32) #include "src/dsp/mips_macro.h" #include "src/enc/vp8i_enc.h" #include "src/enc/cost_enc.h" static const int kC1 = WEBP_TRANSFORM_AC3_C1; static const int kC2 = WEBP_TRANSFORM_AC3_C2; // macro for one vertical pass in ITransformOne // MUL macro inlined // temp0..temp15 holds tmp[0]..tmp[15] // A..D - offsets in bytes to load from in buffer // TEMP0..TEMP3 - registers for corresponding tmp elements // TEMP4..TEMP5 - temporary registers #define VERTICAL_PASS … // macro for one horizontal pass in ITransformOne // MUL and STORE macros inlined // a = clip_8b(a) is replaced with: a = max(a, 0); a = min(a, 255) // temp0..temp15 holds tmp[0]..tmp[15] // A - offset in bytes to load from ref and store to dst buffer // TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements #define HORIZONTAL_PASS … // Does one or two inverse transforms. static WEBP_INLINE void ITransformOne_MIPS32(const uint8_t* ref, const int16_t* in, uint8_t* dst) { int temp0, temp1, temp2, temp3, temp4, temp5, temp6; int temp7, temp8, temp9, temp10, temp11, temp12, temp13; int temp14, temp15, temp16, temp17, temp18, temp19, temp20; const int* args[3] = {(const int*)ref, (const int*)in, (const int*)dst}; __asm__ volatile( "lw %[temp20], 4(%[args]) \n\t" VERTICAL_PASS(0, 16, 8, 24, temp4, temp0, temp1, temp2, temp3) VERTICAL_PASS(2, 18, 10, 26, temp8, temp4, temp5, temp6, temp7) VERTICAL_PASS(4, 20, 12, 28, temp12, temp8, temp9, temp10, temp11) VERTICAL_PASS(6, 22, 14, 30, temp20, temp12, temp13, temp14, temp15) HORIZONTAL_PASS(0, temp0, temp4, temp8, temp12) HORIZONTAL_PASS(1, temp1, temp5, temp9, temp13) HORIZONTAL_PASS(2, temp2, temp6, temp10, temp14) HORIZONTAL_PASS(3, temp3, temp7, temp11, temp15) : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8), [temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11), [temp12]"=&r"(temp12), [temp13]"=&r"(temp13), [temp14]"=&r"(temp14), [temp15]"=&r"(temp15), [temp16]"=&r"(temp16), [temp17]"=&r"(temp17), [temp18]"=&r"(temp18), [temp19]"=&r"(temp19), [temp20]"=&r"(temp20) : [args]"r"(args), [kC1]"r"(kC1), [kC2]"r"(kC2) : "memory", "hi", "lo" ); } static void ITransform_MIPS32(const uint8_t* ref, const int16_t* in, uint8_t* dst, int do_two) { ITransformOne_MIPS32(ref, in, dst); if (do_two) { ITransformOne_MIPS32(ref + 4, in + 16, dst + 4); } } #undef VERTICAL_PASS #undef HORIZONTAL_PASS // macro for one pass through for loop in QuantizeBlock // QUANTDIV macro inlined // J - offset in bytes (kZigzag[n] * 2) // K - offset in bytes (kZigzag[n] * 4) // N - offset in bytes (n * 2) #define QUANTIZE_ONE … static int QuantizeBlock_MIPS32(int16_t in[16], int16_t out[16], const VP8Matrix* const mtx) { int temp0, temp1, temp2, temp3, temp4, temp5; int sign, coeff, level, i; int max_level = MAX_LEVEL; int16_t* ppin = &in[0]; int16_t* pout = &out[0]; const uint16_t* ppsharpen = &mtx->sharpen_[0]; const uint32_t* ppzthresh = &mtx->zthresh_[0]; const uint16_t* ppq = &mtx->q_[0]; const uint16_t* ppiq = &mtx->iq_[0]; const uint32_t* ppbias = &mtx->bias_[0]; __asm__ volatile( QUANTIZE_ONE( 0, 0, 0) QUANTIZE_ONE( 2, 4, 2) QUANTIZE_ONE( 8, 16, 4) QUANTIZE_ONE(16, 32, 6) QUANTIZE_ONE(10, 20, 8) QUANTIZE_ONE( 4, 8, 10) QUANTIZE_ONE( 6, 12, 12) QUANTIZE_ONE(12, 24, 14) QUANTIZE_ONE(18, 36, 16) QUANTIZE_ONE(24, 48, 18) QUANTIZE_ONE(26, 52, 20) QUANTIZE_ONE(20, 40, 22) QUANTIZE_ONE(14, 28, 24) QUANTIZE_ONE(22, 44, 26) QUANTIZE_ONE(28, 56, 28) QUANTIZE_ONE(30, 60, 30) : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [sign]"=&r"(sign), [coeff]"=&r"(coeff), [level]"=&r"(level) : [pout]"r"(pout), [ppin]"r"(ppin), [ppiq]"r"(ppiq), [max_level]"r"(max_level), [ppbias]"r"(ppbias), [ppzthresh]"r"(ppzthresh), [ppsharpen]"r"(ppsharpen), [ppq]"r"(ppq) : "memory", "hi", "lo" ); // moved out from macro to increase possibility for earlier breaking for (i = 15; i >= 0; i--) { if (out[i]) return 1; } return 0; } static int Quantize2Blocks_MIPS32(int16_t in[32], int16_t out[32], const VP8Matrix* const mtx) { int nz; nz = QuantizeBlock_MIPS32(in + 0 * 16, out + 0 * 16, mtx) << 0; nz |= QuantizeBlock_MIPS32(in + 1 * 16, out + 1 * 16, mtx) << 1; return nz; } #undef QUANTIZE_ONE // macro for one horizontal pass in Disto4x4 (TTransform) // two calls of function TTransform are merged into single one // A - offset in bytes to load from a and b buffers // E..H - offsets in bytes to store first results to tmp buffer // E1..H1 - offsets in bytes to store second results to tmp buffer #define HORIZONTAL_PASS … // macro for one vertical pass in Disto4x4 (TTransform) // two calls of function TTransform are merged into single one // since only one accu is available in mips32r1 instruction set // first is done second call of function TTransform and after // that first one. // const int sum1 = TTransform(a, w); // const int sum2 = TTransform(b, w); // return abs(sum2 - sum1) >> 5; // (sum2 - sum1) is calculated with madds (sub2) and msubs (sub1) // A..D - offsets in bytes to load first results from tmp buffer // A1..D1 - offsets in bytes to load second results from tmp buffer // E..H - offsets in bytes to load from w buffer #define VERTICAL_PASS … static int Disto4x4_MIPS32(const uint8_t* const a, const uint8_t* const b, const uint16_t* const w) { int tmp[32]; int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8; __asm__ volatile( HORIZONTAL_PASS(0, 0, 4, 8, 12, 64, 68, 72, 76) HORIZONTAL_PASS(1, 16, 20, 24, 28, 80, 84, 88, 92) HORIZONTAL_PASS(2, 32, 36, 40, 44, 96, 100, 104, 108) HORIZONTAL_PASS(3, 48, 52, 56, 60, 112, 116, 120, 124) "mthi $zero \n\t" "mtlo $zero \n\t" VERTICAL_PASS( 0, 16, 32, 48, 64, 80, 96, 112, 0, 8, 16, 24) VERTICAL_PASS( 4, 20, 36, 52, 68, 84, 100, 116, 2, 10, 18, 26) VERTICAL_PASS( 8, 24, 40, 56, 72, 88, 104, 120, 4, 12, 20, 28) VERTICAL_PASS(12, 28, 44, 60, 76, 92, 108, 124, 6, 14, 22, 30) "mflo %[temp0] \n\t" "sra %[temp1], %[temp0], 31 \n\t" "xor %[temp0], %[temp0], %[temp1] \n\t" "subu %[temp0], %[temp0], %[temp1] \n\t" "sra %[temp0], %[temp0], 5 \n\t" : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8) : [a]"r"(a), [b]"r"(b), [w]"r"(w), [tmp]"r"(tmp) : "memory", "hi", "lo" ); return temp0; } #undef VERTICAL_PASS #undef HORIZONTAL_PASS static int Disto16x16_MIPS32(const uint8_t* const a, const uint8_t* const b, const uint16_t* const w) { int D = 0; int x, y; for (y = 0; y < 16 * BPS; y += 4 * BPS) { for (x = 0; x < 16; x += 4) { D += Disto4x4_MIPS32(a + x + y, b + x + y, w); } } return D; } // macro for one horizontal pass in FTransform // temp0..temp15 holds tmp[0]..tmp[15] // A - offset in bytes to load from src and ref buffers // TEMP0..TEMP3 - registers for corresponding tmp elements #define HORIZONTAL_PASS … // macro for one vertical pass in FTransform // temp0..temp15 holds tmp[0]..tmp[15] // A..D - offsets in bytes to store to out buffer // TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements #define VERTICAL_PASS … static void FTransform_MIPS32(const uint8_t* src, const uint8_t* ref, int16_t* out) { int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8; int temp9, temp10, temp11, temp12, temp13, temp14, temp15, temp16; int temp17, temp18, temp19, temp20; const int c2217 = 2217; const int c5352 = 5352; const int* const args[3] = { (const int*)src, (const int*)ref, (const int*)out }; __asm__ volatile( HORIZONTAL_PASS(0, temp0, temp1, temp2, temp3) HORIZONTAL_PASS(1, temp4, temp5, temp6, temp7) HORIZONTAL_PASS(2, temp8, temp9, temp10, temp11) HORIZONTAL_PASS(3, temp12, temp13, temp14, temp15) "lw %[temp20], 8(%[args]) \n\t" VERTICAL_PASS(0, 8, 16, 24, temp0, temp4, temp8, temp12) VERTICAL_PASS(2, 10, 18, 26, temp1, temp5, temp9, temp13) VERTICAL_PASS(4, 12, 20, 28, temp2, temp6, temp10, temp14) VERTICAL_PASS(6, 14, 22, 30, temp3, temp7, temp11, temp15) : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8), [temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11), [temp12]"=&r"(temp12), [temp13]"=&r"(temp13), [temp14]"=&r"(temp14), [temp15]"=&r"(temp15), [temp16]"=&r"(temp16), [temp17]"=&r"(temp17), [temp18]"=&r"(temp18), [temp19]"=&r"(temp19), [temp20]"=&r"(temp20) : [args]"r"(args), [c2217]"r"(c2217), [c5352]"r"(c5352) : "memory", "hi", "lo" ); } #undef VERTICAL_PASS #undef HORIZONTAL_PASS #if !defined(WORK_AROUND_GCC) #define GET_SSE_INNER … #define GET_SSE … static int SSE16x16_MIPS32(const uint8_t* a, const uint8_t* b) { int count; int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; __asm__ volatile( "mult $zero, $zero \n\t" GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS) GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS) GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS) GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS) GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS) GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS) GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS) GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS) GET_SSE( 8 * BPS, 4 + 8 * BPS, 8 + 8 * BPS, 12 + 8 * BPS) GET_SSE( 9 * BPS, 4 + 9 * BPS, 8 + 9 * BPS, 12 + 9 * BPS) GET_SSE(10 * BPS, 4 + 10 * BPS, 8 + 10 * BPS, 12 + 10 * BPS) GET_SSE(11 * BPS, 4 + 11 * BPS, 8 + 11 * BPS, 12 + 11 * BPS) GET_SSE(12 * BPS, 4 + 12 * BPS, 8 + 12 * BPS, 12 + 12 * BPS) GET_SSE(13 * BPS, 4 + 13 * BPS, 8 + 13 * BPS, 12 + 13 * BPS) GET_SSE(14 * BPS, 4 + 14 * BPS, 8 + 14 * BPS, 12 + 14 * BPS) GET_SSE(15 * BPS, 4 + 15 * BPS, 8 + 15 * BPS, 12 + 15 * BPS) "mflo %[count] \n\t" : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count) : [a]"r"(a), [b]"r"(b) : "memory", "hi", "lo" ); return count; } static int SSE16x8_MIPS32(const uint8_t* a, const uint8_t* b) { int count; int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; __asm__ volatile( "mult $zero, $zero \n\t" GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS) GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS) GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS) GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS) GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS) GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS) GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS) GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS) "mflo %[count] \n\t" : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count) : [a]"r"(a), [b]"r"(b) : "memory", "hi", "lo" ); return count; } static int SSE8x8_MIPS32(const uint8_t* a, const uint8_t* b) { int count; int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; __asm__ volatile( "mult $zero, $zero \n\t" GET_SSE(0 * BPS, 4 + 0 * BPS, 1 * BPS, 4 + 1 * BPS) GET_SSE(2 * BPS, 4 + 2 * BPS, 3 * BPS, 4 + 3 * BPS) GET_SSE(4 * BPS, 4 + 4 * BPS, 5 * BPS, 4 + 5 * BPS) GET_SSE(6 * BPS, 4 + 6 * BPS, 7 * BPS, 4 + 7 * BPS) "mflo %[count] \n\t" : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count) : [a]"r"(a), [b]"r"(b) : "memory", "hi", "lo" ); return count; } static int SSE4x4_MIPS32(const uint8_t* a, const uint8_t* b) { int count; int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; __asm__ volatile( "mult $zero, $zero \n\t" GET_SSE(0 * BPS, 1 * BPS, 2 * BPS, 3 * BPS) "mflo %[count] \n\t" : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count) : [a]"r"(a), [b]"r"(b) : "memory", "hi", "lo" ); return count; } #undef GET_SSE #undef GET_SSE_INNER #endif // !WORK_AROUND_GCC //------------------------------------------------------------------------------ // Entry point extern void VP8EncDspInitMIPS32(void); WEBP_TSAN_IGNORE_FUNCTION void VP8EncDspInitMIPS32(void) { VP8ITransform = ITransform_MIPS32; VP8FTransform = FTransform_MIPS32; VP8EncQuantizeBlock = QuantizeBlock_MIPS32; VP8EncQuantize2Blocks = Quantize2Blocks_MIPS32; VP8TDisto4x4 = Disto4x4_MIPS32; VP8TDisto16x16 = Disto16x16_MIPS32; #if !defined(WORK_AROUND_GCC) VP8SSE16x16 = SSE16x16_MIPS32; VP8SSE8x8 = SSE8x8_MIPS32; VP8SSE16x8 = SSE16x8_MIPS32; VP8SSE4x4 = SSE4x4_MIPS32; #endif } #else // !WEBP_USE_MIPS32 WEBP_DSP_INIT_STUB(VP8EncDspInitMIPS32) #endif // WEBP_USE_MIPS32
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