// basisu_gpu_texture.cpp // Copyright (C) 2019-2024 Binomial LLC. All Rights Reserved. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software // distributed under the License is distributed on an "AS IS" BASIS, // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. #include "basisu_gpu_texture.h" #include "basisu_enc.h" #include "basisu_pvrtc1_4.h" #include "3rdparty/android_astc_decomp.h" #include "basisu_bc7enc.h" #include "../transcoder/basisu_astc_hdr_core.h" namespace basisu { //------------------------------------------------------------------------------------------------ // ETC2 EAC void unpack_etc2_eac(const void *pBlock_bits, color_rgba *pPixels) { … } //------------------------------------------------------------------------------------------------ // BC1 struct bc1_block { … }; // Returns true if the block uses 3 color punchthrough alpha mode. bool unpack_bc1(const void *pBlock_bits, color_rgba *pPixels, bool set_alpha) { … } bool unpack_bc1_nv(const void *pBlock_bits, color_rgba *pPixels, bool set_alpha) { … } static inline int interp_5_6_amd(int c0, int c1) { … } static inline int interp_half_5_6_amd(int c0, int c1) { … } bool unpack_bc1_amd(const void *pBlock_bits, color_rgba *pPixels, bool set_alpha) { … } //------------------------------------------------------------------------------------------------ // BC3-5 struct bc4_block { … }; void unpack_bc4(const void *pBlock_bits, uint8_t *pPixels, uint32_t stride) { … } // Returns false if the block uses 3-color punchthrough alpha mode, which isn't supported on some GPU's for BC3. bool unpack_bc3(const void *pBlock_bits, color_rgba *pPixels) { … } // writes RG void unpack_bc5(const void *pBlock_bits, color_rgba *pPixels) { … } //------------------------------------------------------------------------------------------------ // ATC isn't officially documented, so I'm assuming these references: // http://www.guildsoftware.com/papers/2012.Converting.DXTC.to.ATC.pdf // https://github.com/Triang3l/S3TConv/blob/master/s3tconv_atitc.c // The paper incorrectly says the ATC lerp factors are 1/3 and 2/3, but they are actually 3/8 and 5/8. void unpack_atc(const void* pBlock_bits, color_rgba* pPixels) { … } //------------------------------------------------------------------------------------------------ // BC7 mode 0-7 decompression. // Instead of one monster routine to unpack all the BC7 modes, we're lumping the 3 subset, 2 subset, 1 subset, and dual plane modes together into simple shared routines. static inline uint32_t bc7_dequant(uint32_t val, uint32_t pbit, uint32_t val_bits) { … } static inline uint32_t bc7_dequant(uint32_t val, uint32_t val_bits) { … } static inline uint32_t bc7_interp2(uint32_t l, uint32_t h, uint32_t w) { … } static inline uint32_t bc7_interp3(uint32_t l, uint32_t h, uint32_t w) { … } static inline uint32_t bc7_interp4(uint32_t l, uint32_t h, uint32_t w) { … } static inline uint32_t bc7_interp(uint32_t l, uint32_t h, uint32_t w, uint32_t bits) { … } bool unpack_bc7_mode0_2(uint32_t mode, const void* pBlock_bits, color_rgba* pPixels) { … } bool unpack_bc7_mode1_3_7(uint32_t mode, const void* pBlock_bits, color_rgba* pPixels) { … } bool unpack_bc7_mode4_5(uint32_t mode, const void* pBlock_bits, color_rgba* pPixels) { … } struct bc7_mode_6 { … }; bool unpack_bc7_mode6(const void *pBlock_bits, color_rgba *pPixels) { … } bool unpack_bc7(const void *pBlock, color_rgba *pPixels) { … } static inline int bc6h_sign_extend(int val, int bits) { … } static inline int bc6h_apply_delta(int base, int delta, int num_bits, int is_signed) { … } static int bc6h_dequantize(int val, int bits, int is_signed) { … } static inline int bc6h_interpolate(int a, int b, const uint8_t* pWeights, int index) { … } static inline basist::half_float bc6h_convert_to_half(int val, int is_signed) { … } static inline uint32_t bc6h_get_bits(uint32_t num_bits, uint64_t& l, uint64_t& h, uint32_t& total_bits) { … } static inline uint32_t bc6h_reverse_bits(uint32_t v, uint32_t num_bits) { … } static inline uint64_t bc6h_read_le_qword(const void* p) { … } bool unpack_bc6h(const void* pSrc_block, void* pDst_block, bool is_signed, uint32_t dest_pitch_in_halfs) { … } //------------------------------------------------------------------------------------------------ // FXT1 (for fun, and because some modern Intel parts support it, and because a subset is like BC1) struct fxt1_block { … }; static color_rgba expand_565(const color_rgba& c) { … } // We only support CC_MIXED non-alpha blocks here because that's the only mode the transcoder uses at the moment. bool unpack_fxt1(const void *p, color_rgba *pPixels) { … } //------------------------------------------------------------------------------------------------ // PVRTC2 (non-interpolated, hard_flag=1 modulation=0 subset only!) struct pvrtc2_block { … }; static color_rgba convert_rgb_555_to_888(const color_rgba& col) { … } static color_rgba convert_rgba_5554_to_8888(const color_rgba& col) { … } // PVRTC2 is currently limited to only what our transcoder outputs (non-interpolated, hard_flag=1 modulation=0). In this mode, PVRTC2 looks much like BC1/ATC. bool unpack_pvrtc2(const void *p, color_rgba *pPixels) { … } //------------------------------------------------------------------------------------------------ // ETC2 EAC R11 or RG11 struct etc2_eac_r11 { … }; struct etc2_eac_rg11 { … }; void unpack_etc2_eac_r(const void *p, color_rgba* pPixels, uint32_t c) { … } void unpack_etc2_eac_rg(const void* p, color_rgba* pPixels) { … } //------------------------------------------------------------------------------------------------ // UASTC void unpack_uastc(const void* p, color_rgba* pPixels) { … } // Unpacks to RGBA, R, RG, or A. LDR GPU texture formats only. bool unpack_block(texture_format fmt, const void* pBlock, color_rgba* pPixels) { … } bool unpack_block_hdr(texture_format fmt, const void* pBlock, vec4F* pPixels) { … } bool gpu_image::unpack(image& img) const { … } bool gpu_image::unpack_hdr(imagef& img) const { … } // KTX1 texture file writing static const uint8_t g_ktx_file_id[12] = …; // KTX/GL enums enum { … }; struct ktx_header { … }; // Input is a texture array of mipmapped gpu_image's: gpu_images[array_index][level_index] bool create_ktx_texture_file(uint8_vec &ktx_data, const basisu::vector<gpu_image_vec>& gpu_images, bool cubemap_flag) { … } bool does_dds_support_format(texture_format fmt) { … } // Only supports the basic DirectX BC texture formats. // gpu_images array is: [face/layer][mipmap level] // For cubemap arrays, # of face/layers must be a multiple of 6. // Accepts 2D, 2D mipmapped, 2D array, 2D array mipmapped // and cubemap, cubemap mipmapped, and cubemap array mipmapped. bool write_dds_file(uint8_vec &dds_data, const basisu::vector<gpu_image_vec>& gpu_images, bool cubemap_flag, bool use_srgb_format) { … } bool write_dds_file(const char* pFilename, const basisu::vector<gpu_image_vec>& gpu_images, bool cubemap_flag, bool use_srgb_format) { … } bool read_uncompressed_dds_file(const char* pFilename, basisu::vector<image> &ldr_mips, basisu::vector<imagef>& hdr_mips) { … } bool write_compressed_texture_file(const char* pFilename, const basisu::vector<gpu_image_vec>& g, bool cubemap_flag, bool use_srgb_format) { … } bool write_compressed_texture_file(const char* pFilename, const gpu_image_vec& g, bool use_srgb_format) { … } bool write_compressed_texture_file(const char* pFilename, const gpu_image& g, bool use_srgb_format) { … } //const uint32_t OUT_FILE_MAGIC = 'TEXC'; struct out_file_header { … }; // As no modern tool supports FXT1 format .KTX files, let's write .OUT files and make sure 3DFX's original tools shipped in 1999 can decode our encoded output. bool write_3dfx_out_file(const char* pFilename, const gpu_image& gi) { … } // The .astc texture format is readable using ARM's astcenc, AMD Compressonator, and other engines/tools. It oddly doesn't support mipmaps, limiting // its usefulness/relevance. // https://github.com/ARM-software/astc-encoder/blob/main/Docs/FileFormat.md bool write_astc_file(const char* pFilename, const void* pBlocks, uint32_t block_width, uint32_t block_height, uint32_t dim_x, uint32_t dim_y) { … } } // basisu
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