// SPDX-License-Identifier: GPL-2.0 /* * TSA driver * * Copyright 2022 CS GROUP France * * Author: Herve Codina <[email protected]> */ #include "tsa.h" #include <dt-bindings/soc/cpm1-fsl,tsa.h> #include <dt-bindings/soc/qe-fsl,tsa.h> #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <soc/fsl/qe/ucc.h> /* TSA SI RAM routing tables entry (CPM1) */ #define TSA_CPM1_SIRAM_ENTRY_LAST … #define TSA_CPM1_SIRAM_ENTRY_BYTE … #define TSA_CPM1_SIRAM_ENTRY_CNT_MASK … #define TSA_CPM1_SIRAM_ENTRY_CNT(x) … #define TSA_CPM1_SIRAM_ENTRY_CSEL_MASK … #define TSA_CPM1_SIRAM_ENTRY_CSEL_NU … #define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC2 … #define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC3 … #define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC4 … #define TSA_CPM1_SIRAM_ENTRY_CSEL_SMC1 … #define TSA_CPM1_SIRAM_ENTRY_CSEL_SMC2 … /* TSA SI RAM routing tables entry (QE) */ #define TSA_QE_SIRAM_ENTRY_LAST … #define TSA_QE_SIRAM_ENTRY_BYTE … #define TSA_QE_SIRAM_ENTRY_CNT_MASK … #define TSA_QE_SIRAM_ENTRY_CNT(x) … #define TSA_QE_SIRAM_ENTRY_CSEL_MASK … #define TSA_QE_SIRAM_ENTRY_CSEL_NU … #define TSA_QE_SIRAM_ENTRY_CSEL_UCC5 … #define TSA_QE_SIRAM_ENTRY_CSEL_UCC1 … #define TSA_QE_SIRAM_ENTRY_CSEL_UCC2 … #define TSA_QE_SIRAM_ENTRY_CSEL_UCC3 … #define TSA_QE_SIRAM_ENTRY_CSEL_UCC4 … /* * SI mode register : * - CPM1: 32bit register split in 2*16bit (16bit TDM) * - QE: 4x16bit registers, one per TDM */ #define TSA_CPM1_SIMODE … #define TSA_QE_SIAMR … #define TSA_QE_SIBMR … #define TSA_QE_SICMR … #define TSA_QE_SIDMR … #define TSA_CPM1_SIMODE_SMC2 … #define TSA_CPM1_SIMODE_SMC1 … #define TSA_CPM1_SIMODE_TDMA_MASK … #define TSA_CPM1_SIMODE_TDMA(x) … #define TSA_CPM1_SIMODE_TDMB_MASK … #define TSA_CPM1_SIMODE_TDMB(x) … #define TSA_QE_SIMODE_TDM_SAD_MASK … #define TSA_QE_SIMODE_TDM_SAD(x) … #define TSA_CPM1_SIMODE_TDM_MASK … #define TSA_SIMODE_TDM_SDM_MASK … #define TSA_SIMODE_TDM_SDM_NORM … #define TSA_SIMODE_TDM_SDM_ECHO … #define TSA_SIMODE_TDM_SDM_INTL_LOOP … #define TSA_SIMODE_TDM_SDM_LOOP_CTRL … #define TSA_SIMODE_TDM_RFSD_MASK … #define TSA_SIMODE_TDM_RFSD(x) … #define TSA_SIMODE_TDM_DSC … #define TSA_SIMODE_TDM_CRT … #define TSA_CPM1_SIMODE_TDM_STZ … #define TSA_QE_SIMODE_TDM_SL … #define TSA_SIMODE_TDM_CE … #define TSA_SIMODE_TDM_FE … #define TSA_SIMODE_TDM_GM … #define TSA_SIMODE_TDM_TFSD_MASK … #define TSA_SIMODE_TDM_TFSD(x) … /* CPM SI global mode register (8 bits) */ #define TSA_CPM1_SIGMR … #define TSA_CPM1_SIGMR_ENB … #define TSA_CPM1_SIGMR_ENA … #define TSA_CPM1_SIGMR_RDM_MASK … #define TSA_CPM1_SIGMR_RDM_STATIC_TDMA … #define TSA_CPM1_SIGMR_RDM_DYN_TDMA … #define TSA_CPM1_SIGMR_RDM_STATIC_TDMAB … #define TSA_CPM1_SIGMR_RDM_DYN_TDMAB … /* QE SI global mode register high (8 bits) */ #define TSA_QE_SIGLMRH … #define TSA_QE_SIGLMRH_END … #define TSA_QE_SIGLMRH_ENC … #define TSA_QE_SIGLMRH_ENB … #define TSA_QE_SIGLMRH_ENA … /* SI clock route register (32 bits) */ #define TSA_CPM1_SICR … #define TSA_CPM1_SICR_SCC2_MASK … #define TSA_CPM1_SICR_SCC2(x) … #define TSA_CPM1_SICR_SCC3_MASK … #define TSA_CPM1_SICR_SCC3(x) … #define TSA_CPM1_SICR_SCC4_MASK … #define TSA_CPM1_SICR_SCC4(x) … #define TSA_CPM1_SICR_SCC_MASK … #define TSA_CPM1_SICR_SCC_GRX … #define TSA_CPM1_SICR_SCC_SCX_TSA … #define TSA_CPM1_SICR_SCC_RXCS_MASK … #define TSA_CPM1_SICR_SCC_RXCS_BRG1 … #define TSA_CPM1_SICR_SCC_RXCS_BRG2 … #define TSA_CPM1_SICR_SCC_RXCS_BRG3 … #define TSA_CPM1_SICR_SCC_RXCS_BRG4 … #define TSA_CPM1_SICR_SCC_RXCS_CLK15 … #define TSA_CPM1_SICR_SCC_RXCS_CLK26 … #define TSA_CPM1_SICR_SCC_RXCS_CLK37 … #define TSA_CPM1_SICR_SCC_RXCS_CLK48 … #define TSA_CPM1_SICR_SCC_TXCS_MASK … #define TSA_CPM1_SICR_SCC_TXCS_BRG1 … #define TSA_CPM1_SICR_SCC_TXCS_BRG2 … #define TSA_CPM1_SICR_SCC_TXCS_BRG3 … #define TSA_CPM1_SICR_SCC_TXCS_BRG4 … #define TSA_CPM1_SICR_SCC_TXCS_CLK15 … #define TSA_CPM1_SICR_SCC_TXCS_CLK26 … #define TSA_CPM1_SICR_SCC_TXCS_CLK37 … #define TSA_CPM1_SICR_SCC_TXCS_CLK48 … struct tsa_entries_area { … }; struct tsa_tdm { … }; #define TSA_TDMA … #define TSA_TDMB … #define TSA_TDMC … #define TSA_TDMD … enum tsa_version { … }; struct tsa { … }; static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial) { … } static inline void tsa_write32(void __iomem *addr, u32 val) { … } static inline void tsa_write16(void __iomem *addr, u16 val) { … } static inline void tsa_write8(void __iomem *addr, u8 val) { … } static inline u32 tsa_read32(void __iomem *addr) { … } static inline u16 tsa_read16(void __iomem *addr) { … } static inline void tsa_clrbits32(void __iomem *addr, u32 clr) { … } static inline void tsa_clrbits16(void __iomem *addr, u16 clr) { … } static inline void tsa_clrsetbits32(void __iomem *addr, u32 clr, u32 set) { … } static bool tsa_is_qe(const struct tsa *tsa) { … } static int tsa_qe_serial_get_num(struct tsa_serial *tsa_serial) { … } int tsa_serial_get_num(struct tsa_serial *tsa_serial) { … } EXPORT_SYMBOL(…); static int tsa_cpm1_serial_connect(struct tsa_serial *tsa_serial, bool connect) { … } static int tsa_qe_serial_connect(struct tsa_serial *tsa_serial, bool connect) { … } int tsa_serial_connect(struct tsa_serial *tsa_serial) { … } EXPORT_SYMBOL(…); int tsa_serial_disconnect(struct tsa_serial *tsa_serial) { … } EXPORT_SYMBOL(…); int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *info) { … } EXPORT_SYMBOL(…); static void tsa_cpm1_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, u32 tdms, u32 tdm_id, bool is_rx) { … } static void tsa_qe_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, u32 tdms, u32 tdm_id, bool is_rx) { … } static void tsa_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, u32 tdms, u32 tdm_id, bool is_rx) { … } static const char *tsa_cpm1_serial_id2name(struct tsa *tsa, u32 serial_id) { … } static const char *tsa_qe_serial_id2name(struct tsa *tsa, u32 serial_id) { … } static const char *tsa_serial_id2name(struct tsa *tsa, u32 serial_id) { … } static u32 tsa_cpm1_serial_id2csel(struct tsa *tsa, u32 serial_id) { … } static int tsa_cpm1_add_entry(struct tsa *tsa, struct tsa_entries_area *area, u32 count, u32 serial_id) { … } static u32 tsa_qe_serial_id2csel(struct tsa *tsa, u32 serial_id) { … } static int tsa_qe_add_entry(struct tsa *tsa, struct tsa_entries_area *area, u32 count, u32 serial_id) { … } static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area, u32 count, u32 serial_id) { … } static int tsa_of_parse_tdm_route(struct tsa *tsa, struct device_node *tdm_np, u32 tdms, u32 tdm_id, bool is_rx) { … } static inline int tsa_of_parse_tdm_rx_route(struct tsa *tsa, struct device_node *tdm_np, u32 tdms, u32 tdm_id) { … } static inline int tsa_of_parse_tdm_tx_route(struct tsa *tsa, struct device_node *tdm_np, u32 tdms, u32 tdm_id) { … } static int tsa_of_parse_tdms(struct tsa *tsa, struct device_node *np) { … } static void tsa_init_si_ram(struct tsa *tsa) { … } static int tsa_cpm1_setup(struct tsa *tsa) { … } static int tsa_qe_setup(struct tsa *tsa) { … } static int tsa_setup(struct tsa *tsa) { … } static int tsa_probe(struct platform_device *pdev) { … } static void tsa_remove(struct platform_device *pdev) { … } static const struct of_device_id tsa_id_table[] = …; MODULE_DEVICE_TABLE(of, tsa_id_table); static struct platform_driver tsa_driver = …; module_platform_driver(…) …; struct tsa_serial *tsa_serial_get_byphandle(struct device_node *np, const char *phandle_name) { … } EXPORT_SYMBOL(…); void tsa_serial_put(struct tsa_serial *tsa_serial) { … } EXPORT_SYMBOL(…); static void devm_tsa_serial_release(struct device *dev, void *res) { … } struct tsa_serial *devm_tsa_serial_get_byphandle(struct device *dev, struct device_node *np, const char *phandle_name) { … } EXPORT_SYMBOL(…); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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