/* SPDX-License-Identifier: MIT */ /* * Copyright © 2023 Intel Corporation */ #ifndef __INTEL_COLOR_REGS_H__ #define __INTEL_COLOR_REGS_H__ #include "intel_display_reg_defs.h" /* GMCH palette */ #define _PALETTE_A … #define _PALETTE_B … #define _CHV_PALETTE_C … /* 8bit mode / i965+ 10.6 interpolated mode ldw/udw */ #define PALETTE_RED_MASK … #define PALETTE_GREEN_MASK … #define PALETTE_BLUE_MASK … /* pre-i965 10bit interpolated mode ldw */ #define PALETTE_10BIT_RED_LDW_MASK … #define PALETTE_10BIT_GREEN_LDW_MASK … #define PALETTE_10BIT_BLUE_LDW_MASK … /* pre-i965 10bit interpolated mode udw */ #define PALETTE_10BIT_RED_EXP_MASK … #define PALETTE_10BIT_RED_MANT_MASK … #define PALETTE_10BIT_RED_UDW_MASK … #define PALETTE_10BIT_GREEN_EXP_MASK … #define PALETTE_10BIT_GREEN_MANT_MASK … #define PALETTE_10BIT_GREEN_UDW_MASK … #define PALETTE_10BIT_BLUE_EXP_MASK … #define PALETTE_10BIT_BLUE_MANT_MASK … #define PALETTE_10BIT_BLUE_UDW_MASK … #define PALETTE(dev_priv, pipe, i) … /* i965/g4x/vlv/chv */ #define _PIPEAGCMAX … #define _PIPEBGCMAX … #define PIPEGCMAX(dev_priv, pipe, i) … /* ilk+ palette */ #define _LGC_PALETTE_A … #define _LGC_PALETTE_B … /* see PALETTE_* for the bits */ #define LGC_PALETTE(pipe, i) … /* ilk/snb precision palette */ #define _PREC_PALETTE_A … #define _PREC_PALETTE_B … /* 10bit mode */ #define PREC_PALETTE_10_RED_MASK … #define PREC_PALETTE_10_GREEN_MASK … #define PREC_PALETTE_10_BLUE_MASK … /* 12.4 interpolated mode ldw */ #define PREC_PALETTE_12P4_RED_LDW_MASK … #define PREC_PALETTE_12P4_GREEN_LDW_MASK … #define PREC_PALETTE_12P4_BLUE_LDW_MASK … /* 12.4 interpolated mode udw */ #define PREC_PALETTE_12P4_RED_UDW_MASK … #define PREC_PALETTE_12P4_GREEN_UDW_MASK … #define PREC_PALETTE_12P4_BLUE_UDW_MASK … #define PREC_PALETTE(pipe, i) … #define _PREC_PIPEAGCMAX … #define _PREC_PIPEBGCMAX … #define PREC_PIPEGCMAX(pipe, i) … #define _GAMMA_MODE_A … #define _GAMMA_MODE_B … #define GAMMA_MODE(pipe) … #define PRE_CSC_GAMMA_ENABLE … #define POST_CSC_GAMMA_ENABLE … #define PALETTE_ANTICOL_DISABLE … #define GAMMA_MODE_MODE_MASK … #define GAMMA_MODE_MODE_8BIT … #define GAMMA_MODE_MODE_10BIT … #define GAMMA_MODE_MODE_12BIT … #define GAMMA_MODE_MODE_SPLIT … #define GAMMA_MODE_MODE_12BIT_MULTI_SEG … /* pipe CSC */ #define _PIPE_A_CSC_COEFF_RY_GY … #define _PIPE_A_CSC_COEFF_BY … #define _PIPE_A_CSC_COEFF_RU_GU … #define _PIPE_A_CSC_COEFF_BU … #define _PIPE_A_CSC_COEFF_RV_GV … #define _PIPE_A_CSC_COEFF_BV … #define _PIPE_A_CSC_MODE … #define ICL_CSC_ENABLE … #define ICL_OUTPUT_CSC_ENABLE … #define CSC_BLACK_SCREEN_OFFSET … #define CSC_POSITION_BEFORE_GAMMA … #define CSC_MODE_YUV_TO_RGB … #define _PIPE_A_CSC_PREOFF_HI … #define _PIPE_A_CSC_PREOFF_ME … #define _PIPE_A_CSC_PREOFF_LO … #define _PIPE_A_CSC_POSTOFF_HI … #define _PIPE_A_CSC_POSTOFF_ME … #define _PIPE_A_CSC_POSTOFF_LO … #define _PIPE_B_CSC_COEFF_RY_GY … #define _PIPE_B_CSC_COEFF_BY … #define _PIPE_B_CSC_COEFF_RU_GU … #define _PIPE_B_CSC_COEFF_BU … #define _PIPE_B_CSC_COEFF_RV_GV … #define _PIPE_B_CSC_COEFF_BV … #define _PIPE_B_CSC_MODE … #define _PIPE_B_CSC_PREOFF_HI … #define _PIPE_B_CSC_PREOFF_ME … #define _PIPE_B_CSC_PREOFF_LO … #define _PIPE_B_CSC_POSTOFF_HI … #define _PIPE_B_CSC_POSTOFF_ME … #define _PIPE_B_CSC_POSTOFF_LO … #define PIPE_CSC_COEFF_RY_GY(pipe) … #define PIPE_CSC_COEFF_BY(pipe) … #define PIPE_CSC_COEFF_RU_GU(pipe) … #define PIPE_CSC_COEFF_BU(pipe) … #define PIPE_CSC_COEFF_RV_GV(pipe) … #define PIPE_CSC_COEFF_BV(pipe) … #define PIPE_CSC_MODE(pipe) … #define PIPE_CSC_PREOFF_HI(pipe) … #define PIPE_CSC_PREOFF_ME(pipe) … #define PIPE_CSC_PREOFF_LO(pipe) … #define PIPE_CSC_POSTOFF_HI(pipe) … #define PIPE_CSC_POSTOFF_ME(pipe) … #define PIPE_CSC_POSTOFF_LO(pipe) … /* Pipe Output CSC */ #define _PIPE_A_OUTPUT_CSC_COEFF_RY_GY … #define _PIPE_A_OUTPUT_CSC_COEFF_BY … #define _PIPE_A_OUTPUT_CSC_COEFF_RU_GU … #define _PIPE_A_OUTPUT_CSC_COEFF_BU … #define _PIPE_A_OUTPUT_CSC_COEFF_RV_GV … #define _PIPE_A_OUTPUT_CSC_COEFF_BV … #define _PIPE_A_OUTPUT_CSC_PREOFF_HI … #define _PIPE_A_OUTPUT_CSC_PREOFF_ME … #define _PIPE_A_OUTPUT_CSC_PREOFF_LO … #define _PIPE_A_OUTPUT_CSC_POSTOFF_HI … #define _PIPE_A_OUTPUT_CSC_POSTOFF_ME … #define _PIPE_A_OUTPUT_CSC_POSTOFF_LO … #define _PIPE_B_OUTPUT_CSC_COEFF_RY_GY … #define _PIPE_B_OUTPUT_CSC_COEFF_BY … #define _PIPE_B_OUTPUT_CSC_COEFF_RU_GU … #define _PIPE_B_OUTPUT_CSC_COEFF_BU … #define _PIPE_B_OUTPUT_CSC_COEFF_RV_GV … #define _PIPE_B_OUTPUT_CSC_COEFF_BV … #define _PIPE_B_OUTPUT_CSC_PREOFF_HI … #define _PIPE_B_OUTPUT_CSC_PREOFF_ME … #define _PIPE_B_OUTPUT_CSC_PREOFF_LO … #define _PIPE_B_OUTPUT_CSC_POSTOFF_HI … #define _PIPE_B_OUTPUT_CSC_POSTOFF_ME … #define _PIPE_B_OUTPUT_CSC_POSTOFF_LO … #define PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe) … #define PIPE_CSC_OUTPUT_COEFF_BY(pipe) … #define PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe) … #define PIPE_CSC_OUTPUT_COEFF_BU(pipe) … #define PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe) … #define PIPE_CSC_OUTPUT_COEFF_BV(pipe) … #define PIPE_CSC_OUTPUT_PREOFF_HI(pipe) … #define PIPE_CSC_OUTPUT_PREOFF_ME(pipe) … #define PIPE_CSC_OUTPUT_PREOFF_LO(pipe) … #define PIPE_CSC_OUTPUT_POSTOFF_HI(pipe) … #define PIPE_CSC_OUTPUT_POSTOFF_ME(pipe) … #define PIPE_CSC_OUTPUT_POSTOFF_LO(pipe) … /* pipe degamma/gamma LUTs on IVB+ */ #define _PAL_PREC_INDEX_A … #define _PAL_PREC_INDEX_B … #define _PAL_PREC_INDEX_C … #define PAL_PREC_SPLIT_MODE … #define PAL_PREC_AUTO_INCREMENT … #define PAL_PREC_INDEX_VALUE_MASK … #define PAL_PREC_INDEX_VALUE(x) … #define _PAL_PREC_DATA_A … #define _PAL_PREC_DATA_B … #define _PAL_PREC_DATA_C … /* see PREC_PALETTE_* for the bits */ #define _PAL_PREC_GC_MAX_A … #define _PAL_PREC_GC_MAX_B … #define _PAL_PREC_GC_MAX_C … #define _PAL_PREC_EXT_GC_MAX_A … #define _PAL_PREC_EXT_GC_MAX_B … #define _PAL_PREC_EXT_GC_MAX_C … #define _PAL_PREC_EXT2_GC_MAX_A … #define _PAL_PREC_EXT2_GC_MAX_B … #define _PAL_PREC_EXT2_GC_MAX_C … #define PREC_PAL_INDEX(pipe) … #define PREC_PAL_DATA(pipe) … #define PREC_PAL_GC_MAX(pipe, i) … #define PREC_PAL_EXT_GC_MAX(pipe, i) … #define PREC_PAL_EXT2_GC_MAX(pipe, i) … #define _PRE_CSC_GAMC_INDEX_A … #define _PRE_CSC_GAMC_INDEX_B … #define _PRE_CSC_GAMC_INDEX_C … #define PRE_CSC_GAMC_AUTO_INCREMENT … #define PRE_CSC_GAMC_INDEX_VALUE_MASK … #define PRE_CSC_GAMC_INDEX_VALUE(x) … #define _PRE_CSC_GAMC_DATA_A … #define _PRE_CSC_GAMC_DATA_B … #define _PRE_CSC_GAMC_DATA_C … #define PRE_CSC_GAMC_INDEX(pipe) … #define PRE_CSC_GAMC_DATA(pipe) … /* ICL Multi segmented gamma */ #define _PAL_PREC_MULTI_SEG_INDEX_A … #define _PAL_PREC_MULTI_SEG_INDEX_B … #define PAL_PREC_MULTI_SEG_AUTO_INCREMENT … #define PAL_PREC_MULTI_SEG_INDEX_VALUE_MASK … #define PAL_PREC_MULTI_SEG_INDEX_VALUE(x) … #define _PAL_PREC_MULTI_SEG_DATA_A … #define _PAL_PREC_MULTI_SEG_DATA_B … /* see PREC_PALETTE_12P4_* for the bits */ #define PREC_PAL_MULTI_SEG_INDEX(pipe) … #define PREC_PAL_MULTI_SEG_DATA(pipe) … #define _PIPE_A_WGC_C01_C00 … #define _PIPE_A_WGC_C02 … #define _PIPE_A_WGC_C11_C10 … #define _PIPE_A_WGC_C12 … #define _PIPE_A_WGC_C21_C20 … #define _PIPE_A_WGC_C22 … #define PIPE_WGC_C01_C00(dev_priv, pipe) … #define PIPE_WGC_C02(dev_priv, pipe) … #define PIPE_WGC_C11_C10(dev_priv, pipe) … #define PIPE_WGC_C12(dev_priv, pipe) … #define PIPE_WGC_C21_C20(dev_priv, pipe) … #define PIPE_WGC_C22(dev_priv, pipe) … /* pipe CSC & degamma/gamma LUTs on CHV */ #define _CGM_PIPE_A_CSC_COEFF01 … #define _CGM_PIPE_A_CSC_COEFF23 … #define _CGM_PIPE_A_CSC_COEFF45 … #define _CGM_PIPE_A_CSC_COEFF67 … #define _CGM_PIPE_A_CSC_COEFF8 … #define _CGM_PIPE_A_DEGAMMA … /* cgm degamma ldw */ #define CGM_PIPE_DEGAMMA_GREEN_LDW_MASK … #define CGM_PIPE_DEGAMMA_BLUE_LDW_MASK … /* cgm degamma udw */ #define CGM_PIPE_DEGAMMA_RED_UDW_MASK … #define _CGM_PIPE_A_GAMMA … /* cgm gamma ldw */ #define CGM_PIPE_GAMMA_GREEN_LDW_MASK … #define CGM_PIPE_GAMMA_BLUE_LDW_MASK … /* cgm gamma udw */ #define CGM_PIPE_GAMMA_RED_UDW_MASK … #define _CGM_PIPE_A_MODE … #define CGM_PIPE_MODE_GAMMA … #define CGM_PIPE_MODE_CSC … #define CGM_PIPE_MODE_DEGAMMA … #define _CGM_PIPE_B_CSC_COEFF01 … #define _CGM_PIPE_B_CSC_COEFF23 … #define _CGM_PIPE_B_CSC_COEFF45 … #define _CGM_PIPE_B_CSC_COEFF67 … #define _CGM_PIPE_B_CSC_COEFF8 … #define _CGM_PIPE_B_DEGAMMA … #define _CGM_PIPE_B_GAMMA … #define _CGM_PIPE_B_MODE … #define CGM_PIPE_CSC_COEFF01(pipe) … #define CGM_PIPE_CSC_COEFF23(pipe) … #define CGM_PIPE_CSC_COEFF45(pipe) … #define CGM_PIPE_CSC_COEFF67(pipe) … #define CGM_PIPE_CSC_COEFF8(pipe) … #define CGM_PIPE_DEGAMMA(pipe, i, w) … #define CGM_PIPE_GAMMA(pipe, i, w) … #define CGM_PIPE_MODE(pipe) … /* Skylake+ pipe bottom (background) color */ #define _SKL_BOTTOM_COLOR_A … #define _SKL_BOTTOM_COLOR_B … #define SKL_BOTTOM_COLOR_GAMMA_ENABLE … #define SKL_BOTTOM_COLOR_CSC_ENABLE … #define SKL_BOTTOM_COLOR(pipe) … #endif /* __INTEL_COLOR_REGS_H__ */
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