linux/drivers/pinctrl/qcom/pinctrl-sm6115.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

static const char * const sm6115_tiles[] =;

enum {};

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define SDC_QDSD_PINGROUP(pg_name, _tile, ctl, pull, drv)

#define UFS_RESET(pg_name, offset)
static const struct pinctrl_pin_desc sm6115_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc1_rclk_pins[] =;
static const unsigned int sdc1_clk_pins[] =;
static const unsigned int sdc1_cmd_pins[] =;
static const unsigned int sdc1_data_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum sm6115_functions {};

static const char * const qup0_groups[] =;
static const char * const gpio_groups[] =;
static const char * const ddr_bist_groups[] =;
static const char * const phase_flag_groups[] =;
static const char * const qdss_gpio_groups[] =;
static const char * const atest_groups[] =;
static const char * const mpm_pwr_groups[] =;
static const char * const m_voc_groups[] =;
static const char * const dac_calib_groups[] =;
static const char * const qup1_groups[] =;
static const char * const cri_trng_groups[] =;
static const char * const qup2_groups[] =;
static const char * const qup3_groups[] =;
static const char * const pbs_out_groups[] =;
static const char * const pll_bist_groups[] =;
static const char * const tsense_pwm_groups[] =;
static const char * const agera_pll_groups[] =;
static const char * const pbs_groups[] =;
static const char * const qup4_groups[] =;
static const char * const tgu_groups[] =;
static const char * const qup5_groups[] =;
static const char * const sdc2_tb_groups[] =;
static const char * const sdc1_tb_groups[] =;
static const char * const cam_mclk_groups[] =;
static const char * const adsp_ext_groups[] =;
static const char * const cci_i2c_groups[] =;
static const char * const prng_rosc_groups[] =;
static const char * const cci_timer_groups[] =;
static const char * const gcc_gp1_groups[] =;
static const char * const cci_async_groups[] =;
static const char * const vsense_trigger_groups[] =;
static const char * const qdss_cti_groups[] =;
static const char * const gp_pdm0_groups[] =;
static const char * const gp_pdm1_groups[] =;
static const char * const gp_pdm2_groups[] =;
static const char * const nav_gpio_groups[] =;
static const char * const vfr_1_groups[] =;
static const char * const pa_indicator_groups[] =;
static const char * const gsm1_tx_groups[] =;
static const char * const ssbi_wtr1_groups[] =;
static const char * const pll_bypassnl_groups[] =;
static const char * const pll_reset_groups[] =;
static const char * const ddr_pxi0_groups[] =;
static const char * const gsm0_tx_groups[] =;
static const char * const gcc_gp2_groups[] =;
static const char * const ddr_pxi1_groups[] =;
static const char * const gcc_gp3_groups[] =;
static const char * const dbg_out_groups[] =;
static const char * const uim2_data_groups[] =;
static const char * const uim2_clk_groups[] =;
static const char * const uim2_reset_groups[] =;
static const char * const uim2_present_groups[] =;
static const char * const uim1_data_groups[] =;
static const char * const uim1_clk_groups[] =;
static const char * const uim1_reset_groups[] =;
static const char * const uim1_present_groups[] =;
static const char * const mdp_vsync_groups[] =;
static const char * const mdp_vsync_out_0_groups[] =;
static const char * const mdp_vsync_out_1_groups[] =;
static const char * const usb_phy_groups[] =;
static const char * const mss_lte_groups[] =;
static const char * const wlan1_adc0_groups[] =;
static const char * const wlan1_adc1_groups[] =;
static const char * const sd_write_groups[] =;
static const char * const jitter_bist_groups[] =;
static const char * const ddr_pxi2_groups[] =;
static const char * const ddr_pxi3_groups[] =;

static const struct pinfunction sm6115_functions[] =;

/* Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sm6115_groups[] =;

static const struct msm_gpio_wakeirq_map sm6115_mpm_map[] =;

static const struct msm_pinctrl_soc_data sm6115_tlmm =;

static int sm6115_tlmm_probe(struct platform_device *pdev)
{}

static const struct of_device_id sm6115_tlmm_of_match[] =;

static struct platform_driver sm6115_tlmm_driver =;

static int __init sm6115_tlmm_init(void)
{}
arch_initcall(sm6115_tlmm_init);

static void __exit sm6115_tlmm_exit(void)
{}
module_exit(sm6115_tlmm_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_DEVICE_TABLE(of, sm6115_tlmm_of_match);