/* * Copyright 2022 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "priv.h" #include <subdev/mc.h> #include <subdev/timer.h> bool ga102_flcn_riscv_active(struct nvkm_falcon *falcon) { … } static bool ga102_flcn_dma_done(struct nvkm_falcon *falcon) { … } static void ga102_flcn_dma_xfer(struct nvkm_falcon *falcon, u32 mem_base, u32 dma_base, u32 cmd) { … } static int ga102_flcn_dma_init(struct nvkm_falcon *falcon, u64 dma_addr, int xfer_len, enum nvkm_falcon_mem mem_type, bool sec, u32 *cmd) { … } const struct nvkm_falcon_func_dma ga102_flcn_dma = …; int ga102_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon) { … } int ga102_flcn_reset_prep(struct nvkm_falcon *falcon) { … } int ga102_flcn_select(struct nvkm_falcon *falcon) { … } int ga102_flcn_fw_boot(struct nvkm_falcon_fw *fw, u32 *mbox0, u32 *mbox1, u32 mbox0_ok, u32 irqsclr) { … } int ga102_flcn_fw_load(struct nvkm_falcon_fw *fw) { … } const struct nvkm_falcon_fw_func ga102_flcn_fw = …;