/* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */ /* * Copyright 1996-1997 David J. McKay * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nvreg.h,v 1.6 2002/01/25 21:56:06 tsi Exp $ */ #ifndef __NVREG_H_ #define __NVREG_H_ #define NV_PMC_OFFSET … #define NV_PMC_SIZE … #define NV_PBUS_OFFSET … #define NV_PBUS_SIZE … #define NV_PFIFO_OFFSET … #define NV_PFIFO_SIZE … #define NV_HDIAG_OFFSET … #define NV_HDIAG_SIZE … #define NV_PRAM_OFFSET … #define NV_PRAM_SIZE … #define NV_PVIDEO_OFFSET … #define NV_PVIDEO_SIZE … #define NV_PTIMER_OFFSET … #define NV_PTIMER_SIZE … #define NV_PPM_OFFSET … #define NV_PPM_SIZE … #define NV_PTV_OFFSET … #define NV_PTV_SIZE … #define NV_PRMVGA_OFFSET … #define NV_PRMVGA_SIZE … #define NV_PRMVIO0_OFFSET … #define NV_PRMVIO_SIZE … #define NV_PRMVIO1_OFFSET … #define NV_PFB_OFFSET … #define NV_PFB_SIZE … #define NV_PEXTDEV_OFFSET … #define NV_PEXTDEV_SIZE … #define NV_PME_OFFSET … #define NV_PME_SIZE … #define NV_PROM_OFFSET … #define NV_PROM_SIZE … #define NV_PGRAPH_OFFSET … #define NV_PGRAPH_SIZE … #define NV_PCRTC0_OFFSET … #define NV_PCRTC0_SIZE … #define NV_PRMCIO0_OFFSET … #define NV_PRMCIO_SIZE … #define NV_PRMCIO1_OFFSET … #define NV50_DISPLAY_OFFSET … #define NV50_DISPLAY_SIZE … #define NV_PRAMDAC0_OFFSET … #define NV_PRAMDAC0_SIZE … #define NV_PRMDIO0_OFFSET … #define NV_PRMDIO_SIZE … #define NV_PRMDIO1_OFFSET … #define NV_PRAMIN_OFFSET … #define NV_PRAMIN_SIZE … #define NV_FIFO_OFFSET … #define NV_FIFO_SIZE … #define NV_PMC_BOOT_0 … #define NV_PMC_ENABLE … #define NV_VIO_VSE2 … #define NV_VIO_SRX … #define NV_CIO_CRX__COLOR … #define NV_CIO_CR__COLOR … #define NV_PBUS_DEBUG_1 … #define NV_PBUS_DEBUG_4 … #define NV_PBUS_DEBUG_DUALHEAD_CTL … #define NV_PBUS_POWERCTRL_1 … #define NV_PBUS_POWERCTRL_2 … #define NV_PBUS_POWERCTRL_4 … #define NV_PBUS_PCI_NV_19 … #define NV_PBUS_PCI_NV_20 … #define NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED … #define NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED … #define NV_PFIFO_RAMHT … #define NV_PTV_TV_INDEX … #define NV_PTV_TV_DATA … #define NV_PTV_HFILTER … #define NV_PTV_HFILTER2 … #define NV_PTV_VFILTER … #define NV_PRMVIO_MISC__WRITE … #define NV_PRMVIO_SRX … #define NV_PRMVIO_SR … #define NV_VIO_SR_RESET_INDEX … #define NV_VIO_SR_CLOCK_INDEX … #define NV_VIO_SR_PLANE_MASK_INDEX … #define NV_VIO_SR_CHAR_MAP_INDEX … #define NV_VIO_SR_MEM_MODE_INDEX … #define NV_PRMVIO_MISC__READ … #define NV_PRMVIO_GRX … #define NV_PRMVIO_GX … #define NV_VIO_GX_SR_INDEX … #define NV_VIO_GX_SREN_INDEX … #define NV_VIO_GX_CCOMP_INDEX … #define NV_VIO_GX_ROP_INDEX … #define NV_VIO_GX_READ_MAP_INDEX … #define NV_VIO_GX_MODE_INDEX … #define NV_VIO_GX_MISC_INDEX … #define NV_VIO_GX_DONT_CARE_INDEX … #define NV_VIO_GX_BIT_MASK_INDEX … #define NV_PCRTC_INTR_0 … #define NV_PCRTC_INTR_0_VBLANK … #define NV_PCRTC_INTR_EN_0 … #define NV_PCRTC_START … #define NV_PCRTC_CONFIG … #define NV_PCRTC_CONFIG_START_ADDRESS_NON_VGA … #define NV04_PCRTC_CONFIG_START_ADDRESS_HSYNC … #define NV10_PCRTC_CONFIG_START_ADDRESS_HSYNC … #define NV_PCRTC_CURSOR_CONFIG … #define NV_PCRTC_CURSOR_CONFIG_ENABLE_ENABLE … #define NV_PCRTC_CURSOR_CONFIG_DOUBLE_SCAN_ENABLE … #define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM … #define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32 … #define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64 … #define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_32 … #define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64 … #define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ALPHA … /* note: PCRTC_GPIO is not available on nv10, and in fact aliases 0x600810 */ #define NV_PCRTC_GPIO … #define NV_PCRTC_GPIO_EXT … #define NV_PCRTC_830 … #define NV_PCRTC_834 … #define NV_PCRTC_850 … #define NV_PCRTC_ENGINE_CTRL … #define NV_CRTC_FSEL_I2C … #define NV_CRTC_FSEL_OVERLAY … #define NV_PRMCIO_ARX … #define NV_PRMCIO_AR__WRITE … #define NV_PRMCIO_AR__READ … #define NV_CIO_AR_MODE_INDEX … #define NV_CIO_AR_OSCAN_INDEX … #define NV_CIO_AR_PLANE_INDEX … #define NV_CIO_AR_HPP_INDEX … #define NV_CIO_AR_CSEL_INDEX … #define NV_PRMCIO_INP0 … #define NV_PRMCIO_CRX__COLOR … #define NV_PRMCIO_CR__COLOR … /* Standard VGA CRTC registers */ #define NV_CIO_CR_HDT_INDEX … #define NV_CIO_CR_HDE_INDEX … #define NV_CIO_CR_HBS_INDEX … #define NV_CIO_CR_HBE_INDEX … #define NV_CIO_CR_HBE_4_0 … #define NV_CIO_CR_HRS_INDEX … #define NV_CIO_CR_HRE_INDEX … #define NV_CIO_CR_HRE_4_0 … #define NV_CIO_CR_HRE_HBE_5 … #define NV_CIO_CR_VDT_INDEX … #define NV_CIO_CR_OVL_INDEX … #define NV_CIO_CR_OVL_VDT_8 … #define NV_CIO_CR_OVL_VDE_8 … #define NV_CIO_CR_OVL_VRS_8 … #define NV_CIO_CR_OVL_VBS_8 … #define NV_CIO_CR_OVL_VDT_9 … #define NV_CIO_CR_OVL_VDE_9 … #define NV_CIO_CR_OVL_VRS_9 … #define NV_CIO_CR_RSAL_INDEX … #define NV_CIO_CR_CELL_HT_INDEX … #define NV_CIO_CR_CELL_HT_VBS_9 … #define NV_CIO_CR_CELL_HT_SCANDBL … #define NV_CIO_CR_CURS_ST_INDEX … #define NV_CIO_CR_CURS_END_INDEX … #define NV_CIO_CR_SA_HI_INDEX … #define NV_CIO_CR_SA_LO_INDEX … #define NV_CIO_CR_TCOFF_HI_INDEX … #define NV_CIO_CR_TCOFF_LO_INDEX … #define NV_CIO_CR_VRS_INDEX … #define NV_CIO_CR_VRE_INDEX … #define NV_CIO_CR_VRE_3_0 … #define NV_CIO_CR_VDE_INDEX … #define NV_CIO_CR_OFFSET_INDEX … #define NV_CIO_CR_ULINE_INDEX … #define NV_CIO_CR_VBS_INDEX … #define NV_CIO_CR_VBE_INDEX … #define NV_CIO_CR_MODE_INDEX … #define NV_CIO_CR_LCOMP_INDEX … /* Extended VGA CRTC registers */ #define NV_CIO_CRE_RPC0_INDEX … #define NV_CIO_CRE_RPC0_OFFSET_10_8 … #define NV_CIO_CRE_RPC1_INDEX … #define NV_CIO_CRE_RPC1_LARGE … #define NV_CIO_CRE_FF_INDEX … #define NV_CIO_CRE_ENH_INDEX … #define NV_CIO_SR_LOCK_INDEX … #define NV_CIO_SR_UNLOCK_RW_VALUE … #define NV_CIO_SR_LOCK_VALUE … #define NV_CIO_CRE_FFLWM__INDEX … #define NV_CIO_CRE_21 … #define NV_CIO_CRE_LSR_INDEX … #define NV_CIO_CRE_LSR_VDT_10 … #define NV_CIO_CRE_LSR_VDE_10 … #define NV_CIO_CRE_LSR_VRS_10 … #define NV_CIO_CRE_LSR_VBS_10 … #define NV_CIO_CRE_LSR_HBE_6 … #define NV_CIO_CR_ARX_INDEX … #define NV_CIO_CRE_CHIP_ID_INDEX … #define NV_CIO_CRE_PIXEL_INDEX … #define NV_CIO_CRE_PIXEL_FORMAT … #define NV_CIO_CRE_HEB__INDEX … #define NV_CIO_CRE_HEB_HDT_8 … #define NV_CIO_CRE_HEB_HDE_8 … #define NV_CIO_CRE_HEB_HBS_8 … #define NV_CIO_CRE_HEB_HRS_8 … #define NV_CIO_CRE_HEB_ILC_8 … #define NV_CIO_CRE_2E … #define NV_CIO_CRE_HCUR_ADDR2_INDEX … #define NV_CIO_CRE_HCUR_ADDR0_INDEX … #define NV_CIO_CRE_HCUR_ADDR0_ADR … #define NV_CIO_CRE_HCUR_ASI … #define NV_CIO_CRE_HCUR_ADDR1_INDEX … #define NV_CIO_CRE_HCUR_ADDR1_ENABLE … #define NV_CIO_CRE_HCUR_ADDR1_CUR_DBL … #define NV_CIO_CRE_HCUR_ADDR1_ADR … #define NV_CIO_CRE_LCD__INDEX … #define NV_CIO_CRE_LCD_LCD_SELECT … #define NV_CIO_CRE_LCD_ROUTE_MASK … #define NV_CIO_CRE_DDC0_STATUS__INDEX … #define NV_CIO_CRE_DDC0_WR__INDEX … #define NV_CIO_CRE_ILACE__INDEX … #define NV_CIO_CRE_SCRATCH3__INDEX … #define NV_CIO_CRE_SCRATCH4__INDEX … #define NV_CIO_CRE_DDC_STATUS__INDEX … #define NV_CIO_CRE_DDC_WR__INDEX … #define NV_CIO_CRE_EBR_INDEX … #define NV_CIO_CRE_EBR_VDT_11 … #define NV_CIO_CRE_EBR_VDE_11 … #define NV_CIO_CRE_EBR_VRS_11 … #define NV_CIO_CRE_EBR_VBS_11 … #define NV_CIO_CRE_42 … #define NV_CIO_CRE_42_OFFSET_11 … #define NV_CIO_CRE_43 … #define NV_CIO_CRE_44 … #define NV_CIO_CRE_CSB … #define NV_CIO_CRE_RCR … #define NV_CIO_CRE_RCR_ENDIAN_BIG … #define NV_CIO_CRE_47 … #define NV_CIO_CRE_49 … #define NV_CIO_CRE_4B … #define NV_CIO_CRE_TVOUT_LATENCY … #define NV_CIO_CRE_53 … #define NV_CIO_CRE_54 … #define NV_CIO_CRE_57 … #define NV_CIO_CRE_58 … #define NV_CIO_CRE_59 … #define NV_CIO_CRE_5B … #define NV_CIO_CRE_85 … #define NV_CIO_CRE_86 … #define NV_PRMCIO_INP0__COLOR … #define NV_PRAMDAC_CU_START_POS … #define NV_PRAMDAC_CU_START_POS_X … #define NV_PRAMDAC_CU_START_POS_Y … #define NV_RAMDAC_NV10_CURSYNC … #define NV_PRAMDAC_NVPLL_COEFF … #define NV_PRAMDAC_MPLL_COEFF … #define NV_PRAMDAC_VPLL_COEFF … #define NV30_RAMDAC_ENABLE_VCO2 … #define NV_PRAMDAC_PLL_COEFF_SELECT … #define NV_PRAMDAC_PLL_COEFF_SELECT_USE_VPLL2_TRUE … #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_MPLL … #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_VPLL … #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_NVPLL … #define NV_PRAMDAC_PLL_COEFF_SELECT_PLL_SOURCE_VPLL2 … #define NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1 … #define NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1 … #define NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2 … #define NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2 … #define NV_PRAMDAC_PLL_COEFF_SELECT_TV_CLK_SOURCE_VIP … #define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2 … #define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK2_RATIO_DB2 … #define NV_PRAMDAC_PLL_SETUP_CONTROL … #define NV_RAMDAC_VPLL2 … #define NV_PRAMDAC_SEL_CLK … #define NV_RAMDAC_DITHER_NV11 … #define NV_PRAMDAC_DACCLK … #define NV_PRAMDAC_DACCLK_SEL_DACCLK … #define NV_RAMDAC_NVPLL_B … #define NV_RAMDAC_MPLL_B … #define NV_RAMDAC_VPLL_B … #define NV_RAMDAC_VPLL2_B … #define NV31_RAMDAC_ENABLE_VCO2 … #define NV_PRAMDAC_580 … #define NV_RAMDAC_580_VPLL1_ACTIVE … #define NV_RAMDAC_580_VPLL2_ACTIVE … #define NV_PRAMDAC_GENERAL_CONTROL … #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON … #define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL … #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL … #define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM … #define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS … #define NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG … #define NV_PRAMDAC_TEST_CONTROL … #define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED … #define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF … #define NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI … #define NV_PRAMDAC_TESTPOINT_DATA … #define NV_PRAMDAC_TESTPOINT_DATA_NOTBLANK … #define NV_PRAMDAC_630 … #define NV_PRAMDAC_634 … #define NV_PRAMDAC_TV_SETUP … #define NV_PRAMDAC_TV_VTOTAL … #define NV_PRAMDAC_TV_VSKEW … #define NV_PRAMDAC_TV_VSYNC_DELAY … #define NV_PRAMDAC_TV_HTOTAL … #define NV_PRAMDAC_TV_HSKEW … #define NV_PRAMDAC_TV_HSYNC_DELAY … #define NV_PRAMDAC_TV_HSYNC_DELAY2 … #define NV_PRAMDAC_TV_SETUP … #define NV_PRAMDAC_FP_VDISPLAY_END … #define NV_PRAMDAC_FP_VTOTAL … #define NV_PRAMDAC_FP_VCRTC … #define NV_PRAMDAC_FP_VSYNC_START … #define NV_PRAMDAC_FP_VSYNC_END … #define NV_PRAMDAC_FP_VVALID_START … #define NV_PRAMDAC_FP_VVALID_END … #define NV_PRAMDAC_FP_HDISPLAY_END … #define NV_PRAMDAC_FP_HTOTAL … #define NV_PRAMDAC_FP_HCRTC … #define NV_PRAMDAC_FP_HSYNC_START … #define NV_PRAMDAC_FP_HSYNC_END … #define NV_PRAMDAC_FP_HVALID_START … #define NV_PRAMDAC_FP_HVALID_END … #define NV_RAMDAC_FP_DITHER … #define NV_PRAMDAC_FP_TG_CONTROL … #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS … #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_DISABLE … #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS … #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_DISABLE … #define NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE … #define NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER … #define NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE … #define NV_PRAMDAC_FP_TG_CONTROL_READ_PROG … #define NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 … #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS … #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_DISABLE … #define NV_PRAMDAC_FP_MARGIN_COLOR … #define NV_PRAMDAC_850 … #define NV_PRAMDAC_85C … #define NV_PRAMDAC_FP_DEBUG_0 … #define NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE … #define NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE … /* This doesn't seem to be essential for tmds, but still often set */ #define NV_RAMDAC_FP_DEBUG_0_TMDS_ENABLED … #define NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR … #define NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR … #define NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND … #define NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND … #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_FPCLK … #define NV_PRAMDAC_FP_DEBUG_1 … #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE … #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE … #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE … #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE … #define NV_PRAMDAC_FP_DEBUG_2 … #define NV_PRAMDAC_FP_DEBUG_3 … /* see NV_PRAMDAC_INDIR_TMDS in rules.xml */ #define NV_PRAMDAC_FP_TMDS_CONTROL … #define NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE … #define NV_PRAMDAC_FP_TMDS_DATA … #define NV_PRAMDAC_8C0 … /* Some kind of switch */ #define NV_PRAMDAC_900 … #define NV_PRAMDAC_A20 … #define NV_PRAMDAC_A24 … #define NV_PRAMDAC_A34 … #define NV_PRAMDAC_CTV … /* names fabricated from NV_USER_DAC info */ #define NV_PRMDIO_PIXEL_MASK … #define NV_PRMDIO_PIXEL_MASK_MASK … #define NV_PRMDIO_READ_MODE_ADDRESS … #define NV_PRMDIO_WRITE_MODE_ADDRESS … #define NV_PRMDIO_PALETTE_DATA … #define NV_PGRAPH_DEBUG_0 … #define NV_PGRAPH_DEBUG_1 … #define NV_PGRAPH_DEBUG_2_NV04 … #define NV_PGRAPH_DEBUG_2 … #define NV_PGRAPH_DEBUG_3 … #define NV_PGRAPH_DEBUG_4 … #define NV_PGRAPH_INTR … #define NV_PGRAPH_INTR_EN … #define NV_PGRAPH_CTX_CONTROL … #define NV_PGRAPH_CTX_CONTROL_NV04 … #define NV_PGRAPH_ABS_UCLIP_XMIN … #define NV_PGRAPH_ABS_UCLIP_YMIN … #define NV_PGRAPH_ABS_UCLIP_XMAX … #define NV_PGRAPH_ABS_UCLIP_YMAX … #define NV_PGRAPH_BETA_AND … #define NV_PGRAPH_LIMIT_VIOL_PIX … #define NV_PGRAPH_BOFFSET0 … #define NV_PGRAPH_BOFFSET1 … #define NV_PGRAPH_BOFFSET2 … #define NV_PGRAPH_BLIMIT0 … #define NV_PGRAPH_BLIMIT1 … #define NV_PGRAPH_BLIMIT2 … #define NV_PGRAPH_STATUS … #define NV_PGRAPH_SURFACE … #define NV_PGRAPH_STATE … #define NV_PGRAPH_FIFO … #define NV_PGRAPH_PATTERN_SHAPE … #define NV_PGRAPH_TILE … #define NV_PVIDEO_INTR_EN … #define NV_PVIDEO_BUFFER … #define NV_PVIDEO_STOP … #define NV_PVIDEO_UVPLANE_BASE(buff) … #define NV_PVIDEO_UVPLANE_LIMIT(buff) … #define NV_PVIDEO_UVPLANE_OFFSET_BUFF(buff) … #define NV_PVIDEO_BASE(buff) … #define NV_PVIDEO_LIMIT(buff) … #define NV_PVIDEO_LUMINANCE(buff) … #define NV_PVIDEO_CHROMINANCE(buff) … #define NV_PVIDEO_OFFSET_BUFF(buff) … #define NV_PVIDEO_SIZE_IN(buff) … #define NV_PVIDEO_POINT_IN(buff) … #define NV_PVIDEO_DS_DX(buff) … #define NV_PVIDEO_DT_DY(buff) … #define NV_PVIDEO_POINT_OUT(buff) … #define NV_PVIDEO_SIZE_OUT(buff) … #define NV_PVIDEO_FORMAT(buff) … #define NV_PVIDEO_FORMAT_PLANAR … #define NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8 … #define NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY … #define NV_PVIDEO_FORMAT_MATRIX_ITURBT709 … #define NV_PVIDEO_COLOR_KEY … /* NV04 overlay defines from VIDIX & Haiku */ #define NV_PVIDEO_INTR_EN_0 … #define NV_PVIDEO_STEP_SIZE … #define NV_PVIDEO_CONTROL_Y … #define NV_PVIDEO_CONTROL_X … #define NV_PVIDEO_BUFF0_START_ADDRESS … #define NV_PVIDEO_BUFF0_PITCH_LENGTH … #define NV_PVIDEO_BUFF0_OFFSET … #define NV_PVIDEO_BUFF1_START_ADDRESS … #define NV_PVIDEO_BUFF1_PITCH_LENGTH … #define NV_PVIDEO_BUFF1_OFFSET … #define NV_PVIDEO_OE_STATE … #define NV_PVIDEO_SU_STATE … #define NV_PVIDEO_RM_STATE … #define NV_PVIDEO_WINDOW_START … #define NV_PVIDEO_WINDOW_SIZE … #define NV_PVIDEO_FIFO_THRES_SIZE … #define NV_PVIDEO_FIFO_BURST_LENGTH … #define NV_PVIDEO_KEY … #define NV_PVIDEO_OVERLAY … #define NV_PVIDEO_RED_CSC_OFFSET … #define NV_PVIDEO_GREEN_CSC_OFFSET … #define NV_PVIDEO_BLUE_CSC_OFFSET … #define NV_PVIDEO_CSC_ADJUST … #endif
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