/* * Copyright (c) 1993-2017, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef _clC37b_h_ #define _clC37b_h_ // dma opcode instructions #define NVC37B_DMA #define NVC37B_DMA_OPCODE … #define NVC37B_DMA_OPCODE_METHOD … #define NVC37B_DMA_OPCODE_JUMP … #define NVC37B_DMA_OPCODE_NONINC_METHOD … #define NVC37B_DMA_OPCODE_SET_SUBDEVICE_MASK … #define NVC37B_DMA_METHOD_COUNT … #define NVC37B_DMA_METHOD_OFFSET … #define NVC37B_DMA_DATA … #define NVC37B_DMA_DATA_NOP … #define NVC37B_DMA_JUMP_OFFSET … #define NVC37B_DMA_SET_SUBDEVICE_MASK_VALUE … // class methods #define NVC37B_UPDATE … #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW … #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE … #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE … #define NVC37B_SET_POINT_OUT(b) … #define NVC37B_SET_POINT_OUT_X … #define NVC37B_SET_POINT_OUT_Y … #endif // _clC37b_h
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