linux/drivers/gpu/drm/msm/adreno/a4xx_gpu.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2014 The Linux Foundation. All rights reserved.
 */
#include "a4xx_gpu.h"

#define A4XX_INT0_MASK …

extern bool hang_debug;
static void a4xx_dump(struct msm_gpu *gpu);
static bool a4xx_idle(struct msm_gpu *gpu);

static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
{ … }

/*
 * a4xx_enable_hwcg() - Program the clock control registers
 * @device: The adreno device pointer
 */
static void a4xx_enable_hwcg(struct msm_gpu *gpu)
{ … }


static bool a4xx_me_init(struct msm_gpu *gpu)
{ … }

static int a4xx_hw_init(struct msm_gpu *gpu)
{ … }

static void a4xx_recover(struct msm_gpu *gpu)
{ … }

static void a4xx_destroy(struct msm_gpu *gpu)
{ … }

static bool a4xx_idle(struct msm_gpu *gpu)
{ … }

static irqreturn_t a4xx_irq(struct msm_gpu *gpu)
{ … }

static const unsigned int a4xx_registers[] = …;

static const unsigned int a405_registers[] = …;

static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)
{ … }

static void a4xx_dump(struct msm_gpu *gpu)
{ … }

static int a4xx_pm_resume(struct msm_gpu *gpu) { … }

static int a4xx_pm_suspend(struct msm_gpu *gpu) { … }

static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
{ … }

static u64 a4xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)
{ … }

static u32 a4xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
{ … }

static const struct adreno_gpu_funcs funcs = …;

struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
{ … }