linux/include/linux/mfd/wm8350/pmic.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * pmic.h  --  Power Management Driver for Wolfson WM8350 PMIC
 *
 * Copyright 2007 Wolfson Microelectronics PLC
 */

#ifndef __LINUX_MFD_WM8350_PMIC_H
#define __LINUX_MFD_WM8350_PMIC_H

#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/regulator/machine.h>

/*
 * Register values.
 */

#define WM8350_CURRENT_SINK_DRIVER_A
#define WM8350_CSA_FLASH_CONTROL
#define WM8350_CURRENT_SINK_DRIVER_B
#define WM8350_CSB_FLASH_CONTROL
#define WM8350_DCDC_LDO_REQUESTED
#define WM8350_DCDC_ACTIVE_OPTIONS
#define WM8350_DCDC_SLEEP_OPTIONS
#define WM8350_POWER_CHECK_COMPARATOR
#define WM8350_DCDC1_CONTROL
#define WM8350_DCDC1_TIMEOUTS
#define WM8350_DCDC1_LOW_POWER
#define WM8350_DCDC2_CONTROL
#define WM8350_DCDC2_TIMEOUTS
#define WM8350_DCDC3_CONTROL
#define WM8350_DCDC3_TIMEOUTS
#define WM8350_DCDC3_LOW_POWER
#define WM8350_DCDC4_CONTROL
#define WM8350_DCDC4_TIMEOUTS
#define WM8350_DCDC4_LOW_POWER
#define WM8350_DCDC5_CONTROL
#define WM8350_DCDC5_TIMEOUTS
#define WM8350_DCDC6_CONTROL
#define WM8350_DCDC6_TIMEOUTS
#define WM8350_DCDC6_LOW_POWER
#define WM8350_LIMIT_SWITCH_CONTROL
#define WM8350_LDO1_CONTROL
#define WM8350_LDO1_TIMEOUTS
#define WM8350_LDO1_LOW_POWER
#define WM8350_LDO2_CONTROL
#define WM8350_LDO2_TIMEOUTS
#define WM8350_LDO2_LOW_POWER
#define WM8350_LDO3_CONTROL
#define WM8350_LDO3_TIMEOUTS
#define WM8350_LDO3_LOW_POWER
#define WM8350_LDO4_CONTROL
#define WM8350_LDO4_TIMEOUTS
#define WM8350_LDO4_LOW_POWER
#define WM8350_VCC_FAULT_MASKS
#define WM8350_MAIN_BANDGAP_CONTROL
#define WM8350_OSC_CONTROL
#define WM8350_RTC_TICK_CONTROL
#define WM8350_SECURITY
#define WM8350_RAM_BIST_1
#define WM8350_DCDC_LDO_STATUS
#define WM8350_GPIO_PIN_STATUS

#define WM8350_DCDC1_FORCE_PWM
#define WM8350_DCDC3_FORCE_PWM
#define WM8350_DCDC4_FORCE_PWM
#define WM8350_DCDC6_FORCE_PWM

/*
 * R172 (0xAC) - Current Sink Driver A
 */
#define WM8350_CS1_HIB_MODE
#define WM8350_CS1_HIB_MODE_MASK
#define WM8350_CS1_HIB_MODE_SHIFT
#define WM8350_CS1_ISEL_MASK
#define WM8350_CS1_ISEL_SHIFT

/* Bit values for R172 (0xAC) */
#define WM8350_CS1_HIB_MODE_DISABLE
#define WM8350_CS1_HIB_MODE_LEAVE

#define WM8350_CS1_ISEL_220M

/*
 * R173 (0xAD) - CSA Flash control
 */
#define WM8350_CS1_FLASH_MODE
#define WM8350_CS1_TRIGSRC
#define WM8350_CS1_DRIVE
#define WM8350_CS1_FLASH_DUR_MASK
#define WM8350_CS1_OFF_RAMP_MASK
#define WM8350_CS1_ON_RAMP_MASK

/*
 * R174 (0xAE) - Current Sink Driver B
 */
#define WM8350_CS2_HIB_MODE
#define WM8350_CS2_ISEL_MASK

/*
 * R175 (0xAF) - CSB Flash control
 */
#define WM8350_CS2_FLASH_MODE
#define WM8350_CS2_TRIGSRC
#define WM8350_CS2_DRIVE
#define WM8350_CS2_FLASH_DUR_MASK
#define WM8350_CS2_OFF_RAMP_MASK
#define WM8350_CS2_ON_RAMP_MASK

/*
 * R176 (0xB0) - DCDC/LDO requested
 */
#define WM8350_LS_ENA
#define WM8350_LDO4_ENA
#define WM8350_LDO3_ENA
#define WM8350_LDO2_ENA
#define WM8350_LDO1_ENA
#define WM8350_DC6_ENA
#define WM8350_DC5_ENA
#define WM8350_DC4_ENA
#define WM8350_DC3_ENA
#define WM8350_DC2_ENA
#define WM8350_DC1_ENA

/*
 * R177 (0xB1) - DCDC Active options
 */
#define WM8350_PUTO_MASK
#define WM8350_PWRUP_DELAY_MASK
#define WM8350_DC6_ACTIVE
#define WM8350_DC4_ACTIVE
#define WM8350_DC3_ACTIVE
#define WM8350_DC1_ACTIVE

/*
 * R178 (0xB2) - DCDC Sleep options
 */
#define WM8350_DC6_SLEEP
#define WM8350_DC4_SLEEP
#define WM8350_DC3_SLEEP
#define WM8350_DC1_SLEEP

/*
 * R179 (0xB3) - Power-check comparator
 */
#define WM8350_PCCMP_ERRACT
#define WM8350_PCCMP_RAIL
#define WM8350_PCCMP_OFF_THR_MASK
#define WM8350_PCCMP_ON_THR_MASK

/*
 * R180 (0xB4) - DCDC1 Control
 */
#define WM8350_DC1_OPFLT
#define WM8350_DC1_VSEL_MASK
#define WM8350_DC1_VSEL_SHIFT

/*
 * R181 (0xB5) - DCDC1 Timeouts
 */
#define WM8350_DC1_ERRACT_MASK
#define WM8350_DC1_ERRACT_SHIFT
#define WM8350_DC1_ENSLOT_MASK
#define WM8350_DC1_ENSLOT_SHIFT
#define WM8350_DC1_SDSLOT_MASK
#define WM8350_DC1_UVTO_MASK
#define WM8350_DC1_SDSLOT_SHIFT

/* Bit values for R181 (0xB5) */
#define WM8350_DC1_ERRACT_NONE
#define WM8350_DC1_ERRACT_SHUTDOWN_CONV
#define WM8350_DC1_ERRACT_SHUTDOWN_SYS

/*
 * R182 (0xB6) - DCDC1 Low Power
 */
#define WM8350_DC1_HIB_MODE_MASK
#define WM8350_DC1_HIB_TRIG_MASK
#define WM8350_DC1_VIMG_MASK

/*
 * R183 (0xB7) - DCDC2 Control
 */
#define WM8350_DC2_MODE
#define WM8350_DC2_MODE_MASK
#define WM8350_DC2_MODE_SHIFT
#define WM8350_DC2_HIB_MODE
#define WM8350_DC2_HIB_MODE_MASK
#define WM8350_DC2_HIB_MODE_SHIFT
#define WM8350_DC2_HIB_TRIG_MASK
#define WM8350_DC2_HIB_TRIG_SHIFT
#define WM8350_DC2_ILIM
#define WM8350_DC2_ILIM_MASK
#define WM8350_DC2_ILIM_SHIFT
#define WM8350_DC2_RMP_MASK
#define WM8350_DC2_RMP_SHIFT
#define WM8350_DC2_FBSRC_MASK
#define WM8350_DC2_FBSRC_SHIFT

/* Bit values for R183 (0xB7) */
#define WM8350_DC2_MODE_BOOST
#define WM8350_DC2_MODE_SWITCH

#define WM8350_DC2_HIB_MODE_ACTIVE
#define WM8350_DC2_HIB_MODE_DISABLE

#define WM8350_DC2_HIB_TRIG_NONE
#define WM8350_DC2_HIB_TRIG_LPWR1
#define WM8350_DC2_HIB_TRIG_LPWR2
#define WM8350_DC2_HIB_TRIG_LPWR3

#define WM8350_DC2_ILIM_HIGH
#define WM8350_DC2_ILIM_LOW

#define WM8350_DC2_RMP_30V
#define WM8350_DC2_RMP_20V
#define WM8350_DC2_RMP_10V
#define WM8350_DC2_RMP_5V

#define WM8350_DC2_FBSRC_FB2
#define WM8350_DC2_FBSRC_ISINKA
#define WM8350_DC2_FBSRC_ISINKB
#define WM8350_DC2_FBSRC_USB

/*
 * R184 (0xB8) - DCDC2 Timeouts
 */
#define WM8350_DC2_ERRACT_MASK
#define WM8350_DC2_ERRACT_SHIFT
#define WM8350_DC2_ENSLOT_MASK
#define WM8350_DC2_ENSLOT_SHIFT
#define WM8350_DC2_SDSLOT_MASK
#define WM8350_DC2_UVTO_MASK

/* Bit values for R184 (0xB8) */
#define WM8350_DC2_ERRACT_NONE
#define WM8350_DC2_ERRACT_SHUTDOWN_CONV
#define WM8350_DC2_ERRACT_SHUTDOWN_SYS

/*
 * R186 (0xBA) - DCDC3 Control
 */
#define WM8350_DC3_OPFLT
#define WM8350_DC3_VSEL_MASK
#define WM8350_DC3_VSEL_SHIFT

/*
 * R187 (0xBB) - DCDC3 Timeouts
 */
#define WM8350_DC3_ERRACT_MASK
#define WM8350_DC3_ERRACT_SHIFT
#define WM8350_DC3_ENSLOT_MASK
#define WM8350_DC3_ENSLOT_SHIFT
#define WM8350_DC3_SDSLOT_MASK
#define WM8350_DC3_UVTO_MASK
#define WM8350_DC3_SDSLOT_SHIFT

/* Bit values for R187 (0xBB) */
#define WM8350_DC3_ERRACT_NONE
#define WM8350_DC3_ERRACT_SHUTDOWN_CONV
#define WM8350_DC3_ERRACT_SHUTDOWN_SYS
/*
 * R188 (0xBC) - DCDC3 Low Power
 */
#define WM8350_DC3_HIB_MODE_MASK
#define WM8350_DC3_HIB_TRIG_MASK
#define WM8350_DC3_VIMG_MASK

/*
 * R189 (0xBD) - DCDC4 Control
 */
#define WM8350_DC4_OPFLT
#define WM8350_DC4_VSEL_MASK
#define WM8350_DC4_VSEL_SHIFT

/*
 * R190 (0xBE) - DCDC4 Timeouts
 */
#define WM8350_DC4_ERRACT_MASK
#define WM8350_DC4_ERRACT_SHIFT
#define WM8350_DC4_ENSLOT_MASK
#define WM8350_DC4_ENSLOT_SHIFT
#define WM8350_DC4_SDSLOT_MASK
#define WM8350_DC4_UVTO_MASK
#define WM8350_DC4_SDSLOT_SHIFT

/* Bit values for R190 (0xBE) */
#define WM8350_DC4_ERRACT_NONE
#define WM8350_DC4_ERRACT_SHUTDOWN_CONV
#define WM8350_DC4_ERRACT_SHUTDOWN_SYS

/*
 * R191 (0xBF) - DCDC4 Low Power
 */
#define WM8350_DC4_HIB_MODE_MASK
#define WM8350_DC4_HIB_TRIG_MASK
#define WM8350_DC4_VIMG_MASK

/*
 * R192 (0xC0) - DCDC5 Control
 */
#define WM8350_DC5_MODE
#define WM8350_DC5_MODE_MASK
#define WM8350_DC5_MODE_SHIFT
#define WM8350_DC5_HIB_MODE
#define WM8350_DC5_HIB_MODE_MASK
#define WM8350_DC5_HIB_MODE_SHIFT
#define WM8350_DC5_HIB_TRIG_MASK
#define WM8350_DC5_HIB_TRIG_SHIFT
#define WM8350_DC5_ILIM
#define WM8350_DC5_ILIM_MASK
#define WM8350_DC5_ILIM_SHIFT
#define WM8350_DC5_RMP_MASK
#define WM8350_DC5_RMP_SHIFT
#define WM8350_DC5_FBSRC_MASK
#define WM8350_DC5_FBSRC_SHIFT

/* Bit values for R192 (0xC0) */
#define WM8350_DC5_MODE_BOOST
#define WM8350_DC5_MODE_SWITCH

#define WM8350_DC5_HIB_MODE_ACTIVE
#define WM8350_DC5_HIB_MODE_DISABLE

#define WM8350_DC5_HIB_TRIG_NONE
#define WM8350_DC5_HIB_TRIG_LPWR1
#define WM8350_DC5_HIB_TRIG_LPWR2
#define WM8350_DC5_HIB_TRIG_LPWR3

#define WM8350_DC5_ILIM_HIGH
#define WM8350_DC5_ILIM_LOW

#define WM8350_DC5_RMP_30V
#define WM8350_DC5_RMP_20V
#define WM8350_DC5_RMP_10V
#define WM8350_DC5_RMP_5V

#define WM8350_DC5_FBSRC_FB2
#define WM8350_DC5_FBSRC_ISINKA
#define WM8350_DC5_FBSRC_ISINKB
#define WM8350_DC5_FBSRC_USB

/*
 * R193 (0xC1) - DCDC5 Timeouts
 */
#define WM8350_DC5_ERRACT_MASK
#define WM8350_DC5_ERRACT_SHIFT
#define WM8350_DC5_ENSLOT_MASK
#define WM8350_DC5_ENSLOT_SHIFT
#define WM8350_DC5_SDSLOT_MASK
#define WM8350_DC5_UVTO_MASK
#define WM8350_DC5_SDSLOT_SHIFT

/* Bit values for R193 (0xC1) */
#define WM8350_DC5_ERRACT_NONE
#define WM8350_DC5_ERRACT_SHUTDOWN_CONV
#define WM8350_DC5_ERRACT_SHUTDOWN_SYS

/*
 * R195 (0xC3) - DCDC6 Control
 */
#define WM8350_DC6_OPFLT
#define WM8350_DC6_VSEL_MASK
#define WM8350_DC6_VSEL_SHIFT

/*
 * R196 (0xC4) - DCDC6 Timeouts
 */
#define WM8350_DC6_ERRACT_MASK
#define WM8350_DC6_ERRACT_SHIFT
#define WM8350_DC6_ENSLOT_MASK
#define WM8350_DC6_ENSLOT_SHIFT
#define WM8350_DC6_SDSLOT_MASK
#define WM8350_DC6_UVTO_MASK
#define WM8350_DC6_SDSLOT_SHIFT

/* Bit values for R196 (0xC4) */
#define WM8350_DC6_ERRACT_NONE
#define WM8350_DC6_ERRACT_SHUTDOWN_CONV
#define WM8350_DC6_ERRACT_SHUTDOWN_SYS

/*
 * R197 (0xC5) - DCDC6 Low Power
 */
#define WM8350_DC6_HIB_MODE_MASK
#define WM8350_DC6_HIB_TRIG_MASK
#define WM8350_DC6_VIMG_MASK

/*
 * R199 (0xC7) - Limit Switch Control
 */
#define WM8350_LS_ERRACT_MASK
#define WM8350_LS_ERRACT_SHIFT
#define WM8350_LS_ENSLOT_MASK
#define WM8350_LS_ENSLOT_SHIFT
#define WM8350_LS_SDSLOT_MASK
#define WM8350_LS_SDSLOT_SHIFT
#define WM8350_LS_HIB_MODE
#define WM8350_LS_HIB_MODE_MASK
#define WM8350_LS_HIB_MODE_SHIFT
#define WM8350_LS_HIB_PROT
#define WM8350_LS_HIB_PROT_MASK
#define WM8350_LS_HIB_PROT_SHIFT
#define WM8350_LS_PROT
#define WM8350_LS_PROT_MASK
#define WM8350_LS_PROT_SHIFT

/* Bit values for R199 (0xC7) */
#define WM8350_LS_ERRACT_NONE
#define WM8350_LS_ERRACT_SHUTDOWN_CONV
#define WM8350_LS_ERRACT_SHUTDOWN_SYS

/*
 * R200 (0xC8) - LDO1 Control
 */
#define WM8350_LDO1_SWI
#define WM8350_LDO1_OPFLT
#define WM8350_LDO1_VSEL_MASK
#define WM8350_LDO1_VSEL_SHIFT

/*
 * R201 (0xC9) - LDO1 Timeouts
 */
#define WM8350_LDO1_ERRACT_MASK
#define WM8350_LDO1_ERRACT_SHIFT
#define WM8350_LDO1_ENSLOT_MASK
#define WM8350_LDO1_ENSLOT_SHIFT
#define WM8350_LDO1_SDSLOT_MASK
#define WM8350_LDO1_UVTO_MASK
#define WM8350_LDO1_SDSLOT_SHIFT

/* Bit values for R201 (0xC9) */
#define WM8350_LDO1_ERRACT_NONE
#define WM8350_LDO1_ERRACT_SHUTDOWN_CONV
#define WM8350_LDO1_ERRACT_SHUTDOWN_SYS

/*
 * R202 (0xCA) - LDO1 Low Power
 */
#define WM8350_LDO1_HIB_MODE_MASK
#define WM8350_LDO1_HIB_TRIG_MASK
#define WM8350_LDO1_VIMG_MASK
#define WM8350_LDO1_HIB_MODE_DIS


/*
 * R203 (0xCB) - LDO2 Control
 */
#define WM8350_LDO2_SWI
#define WM8350_LDO2_OPFLT
#define WM8350_LDO2_VSEL_MASK
#define WM8350_LDO2_VSEL_SHIFT

/*
 * R204 (0xCC) - LDO2 Timeouts
 */
#define WM8350_LDO2_ERRACT_MASK
#define WM8350_LDO2_ERRACT_SHIFT
#define WM8350_LDO2_ENSLOT_MASK
#define WM8350_LDO2_ENSLOT_SHIFT
#define WM8350_LDO2_SDSLOT_MASK
#define WM8350_LDO2_SDSLOT_SHIFT

/* Bit values for R204 (0xCC) */
#define WM8350_LDO2_ERRACT_NONE
#define WM8350_LDO2_ERRACT_SHUTDOWN_CONV
#define WM8350_LDO2_ERRACT_SHUTDOWN_SYS

/*
 * R205 (0xCD) - LDO2 Low Power
 */
#define WM8350_LDO2_HIB_MODE_MASK
#define WM8350_LDO2_HIB_TRIG_MASK
#define WM8350_LDO2_VIMG_MASK

/*
 * R206 (0xCE) - LDO3 Control
 */
#define WM8350_LDO3_SWI
#define WM8350_LDO3_OPFLT
#define WM8350_LDO3_VSEL_MASK
#define WM8350_LDO3_VSEL_SHIFT

/*
 * R207 (0xCF) - LDO3 Timeouts
 */
#define WM8350_LDO3_ERRACT_MASK
#define WM8350_LDO3_ERRACT_SHIFT
#define WM8350_LDO3_ENSLOT_MASK
#define WM8350_LDO3_ENSLOT_SHIFT
#define WM8350_LDO3_SDSLOT_MASK
#define WM8350_LDO3_UVTO_MASK
#define WM8350_LDO3_SDSLOT_SHIFT

/* Bit values for R207 (0xCF) */
#define WM8350_LDO3_ERRACT_NONE
#define WM8350_LDO3_ERRACT_SHUTDOWN_CONV
#define WM8350_LDO3_ERRACT_SHUTDOWN_SYS

/*
 * R208 (0xD0) - LDO3 Low Power
 */
#define WM8350_LDO3_HIB_MODE_MASK
#define WM8350_LDO3_HIB_TRIG_MASK
#define WM8350_LDO3_VIMG_MASK

/*
 * R209 (0xD1) - LDO4 Control
 */
#define WM8350_LDO4_SWI
#define WM8350_LDO4_OPFLT
#define WM8350_LDO4_VSEL_MASK
#define WM8350_LDO4_VSEL_SHIFT

/*
 * R210 (0xD2) - LDO4 Timeouts
 */
#define WM8350_LDO4_ERRACT_MASK
#define WM8350_LDO4_ERRACT_SHIFT
#define WM8350_LDO4_ENSLOT_MASK
#define WM8350_LDO4_ENSLOT_SHIFT
#define WM8350_LDO4_SDSLOT_MASK
#define WM8350_LDO4_UVTO_MASK
#define WM8350_LDO4_SDSLOT_SHIFT

/* Bit values for R210 (0xD2) */
#define WM8350_LDO4_ERRACT_NONE
#define WM8350_LDO4_ERRACT_SHUTDOWN_CONV
#define WM8350_LDO4_ERRACT_SHUTDOWN_SYS

/*
 * R211 (0xD3) - LDO4 Low Power
 */
#define WM8350_LDO4_HIB_MODE_MASK
#define WM8350_LDO4_HIB_TRIG_MASK
#define WM8350_LDO4_VIMG_MASK

/*
 * R215 (0xD7) - VCC_FAULT Masks
 */
#define WM8350_LS_FAULT
#define WM8350_LDO4_FAULT
#define WM8350_LDO3_FAULT
#define WM8350_LDO2_FAULT
#define WM8350_LDO1_FAULT
#define WM8350_DC6_FAULT
#define WM8350_DC5_FAULT
#define WM8350_DC4_FAULT
#define WM8350_DC3_FAULT
#define WM8350_DC2_FAULT
#define WM8350_DC1_FAULT

/*
 * R216 (0xD8) - Main Bandgap Control
 */
#define WM8350_MBG_LOAD_FUSES
#define WM8350_MBG_FUSE_WPREP
#define WM8350_MBG_FUSE_WRITE
#define WM8350_MBG_FUSE_TRIM_MASK
#define WM8350_MBG_TRIM_SRC
#define WM8350_MBG_USER_TRIM_MASK

/*
 * R217 (0xD9) - OSC Control
 */
#define WM8350_OSC_LOAD_FUSES
#define WM8350_OSC_FUSE_WPREP
#define WM8350_OSC_FUSE_WRITE
#define WM8350_OSC_FUSE_TRIM_MASK
#define WM8350_OSC_TRIM_SRC
#define WM8350_OSC_USER_TRIM_MASK

/*
 * R248 (0xF8) - DCDC1 Force PWM
 */
#define WM8350_DCDC1_FORCE_PWM_ENA

/*
 * R250 (0xFA) - DCDC3 Force PWM
 */
#define WM8350_DCDC3_FORCE_PWM_ENA

/*
 * R251 (0xFB) - DCDC4 Force PWM
 */
#define WM8350_DCDC4_FORCE_PWM_ENA

/*
 * R253 (0xFD) - DCDC1 Force PWM
 */
#define WM8350_DCDC6_FORCE_PWM_ENA

/*
 * DCDC's
 */
#define WM8350_DCDC_1
#define WM8350_DCDC_2
#define WM8350_DCDC_3
#define WM8350_DCDC_4
#define WM8350_DCDC_5
#define WM8350_DCDC_6

/* DCDC modes */
#define WM8350_DCDC_ACTIVE_STANDBY
#define WM8350_DCDC_ACTIVE_PULSE
#define WM8350_DCDC_SLEEP_NORMAL
#define WM8350_DCDC_SLEEP_LOW

/* DCDC Low power (Hibernate) mode */
#define WM8350_DCDC_HIB_MODE_CUR
#define WM8350_DCDC_HIB_MODE_IMAGE
#define WM8350_DCDC_HIB_MODE_STANDBY
#define WM8350_DCDC_HIB_MODE_LDO
#define WM8350_DCDC_HIB_MODE_LDO_IM
#define WM8350_DCDC_HIB_MODE_DIS
#define WM8350_DCDC_HIB_MODE_MASK

/* DCDC Low Power (Hibernate) signal */
#define WM8350_DCDC_HIB_SIG_REG
#define WM8350_DCDC_HIB_SIG_LPWR1
#define WM8350_DCDC_HIB_SIG_LPWR2
#define WM8350_DCDC_HIB_SIG_LPWR3

/* LDO Low power (Hibernate) mode */
#define WM8350_LDO_HIB_MODE_IMAGE
#define WM8350_LDO_HIB_MODE_DIS

/* LDO Low Power (Hibernate) signal */
#define WM8350_LDO_HIB_SIG_REG
#define WM8350_LDO_HIB_SIG_LPWR1
#define WM8350_LDO_HIB_SIG_LPWR2
#define WM8350_LDO_HIB_SIG_LPWR3

/*
 * LDOs
 */
#define WM8350_LDO_1
#define WM8350_LDO_2
#define WM8350_LDO_3
#define WM8350_LDO_4

/*
 * ISINKs
 */
#define WM8350_ISINK_A
#define WM8350_ISINK_B

#define WM8350_ISINK_MODE_BOOST
#define WM8350_ISINK_MODE_SWITCH
#define WM8350_ISINK_ILIM_NORMAL
#define WM8350_ISINK_ILIM_LOW

#define WM8350_ISINK_FLASH_DISABLE
#define WM8350_ISINK_FLASH_ENABLE
#define WM8350_ISINK_FLASH_TRIG_BIT
#define WM8350_ISINK_FLASH_TRIG_GPIO
#define WM8350_ISINK_FLASH_MODE_EN
#define WM8350_ISINK_FLASH_MODE_DIS
#define WM8350_ISINK_FLASH_DUR_32MS
#define WM8350_ISINK_FLASH_DUR_64MS
#define WM8350_ISINK_FLASH_DUR_96MS
#define WM8350_ISINK_FLASH_DUR_1024MS
#define WM8350_ISINK_FLASH_ON_INSTANT
#define WM8350_ISINK_FLASH_ON_0_25S
#define WM8350_ISINK_FLASH_ON_0_50S
#define WM8350_ISINK_FLASH_ON_1_00S
#define WM8350_ISINK_FLASH_ON_1_95S
#define WM8350_ISINK_FLASH_ON_3_91S
#define WM8350_ISINK_FLASH_ON_7_80S
#define WM8350_ISINK_FLASH_OFF_INSTANT
#define WM8350_ISINK_FLASH_OFF_0_25S
#define WM8350_ISINK_FLASH_OFF_0_50S
#define WM8350_ISINK_FLASH_OFF_1_00S
#define WM8350_ISINK_FLASH_OFF_1_95S
#define WM8350_ISINK_FLASH_OFF_3_91S
#define WM8350_ISINK_FLASH_OFF_7_80S

/*
 * Regulator Interrupts.
 */
#define WM8350_IRQ_CS1
#define WM8350_IRQ_CS2
#define WM8350_IRQ_UV_LDO4
#define WM8350_IRQ_UV_LDO3
#define WM8350_IRQ_UV_LDO2
#define WM8350_IRQ_UV_LDO1
#define WM8350_IRQ_UV_DC6
#define WM8350_IRQ_UV_DC5
#define WM8350_IRQ_UV_DC4
#define WM8350_IRQ_UV_DC3
#define WM8350_IRQ_UV_DC2
#define WM8350_IRQ_UV_DC1
#define WM8350_IRQ_OC_LS

#define NUM_WM8350_REGULATORS

struct wm8350;
struct platform_device;
struct regulator_init_data;

/*
 * WM8350 LED platform data
 */
struct wm8350_led_platform_data {};

struct wm8350_led {};

struct wm8350_pmic {};

int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
			      struct regulator_init_data *initdata);
int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
			struct wm8350_led_platform_data *pdata);

/*
 * Additional DCDC control not supported via regulator API
 */
int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
			 u16 stop, u16 fault);
int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
			   u16 ilim, u16 ramp, u16 feedback);

/*
 * Additional LDO control not supported via regulator API
 */
int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop);

/*
 * Additional ISINK control not supported via regulator API
 */
int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
			   u16 trigger, u16 duration, u16 on_ramp,
			   u16 off_ramp, u16 drive);

#endif