/* SPDX-License-Identifier: GPL-2.0 * flexcan.c - FLEXCAN CAN controller driver * * Copyright (c) 2005-2006 Varma Electronics Oy * Copyright (c) 2009 Sascha Hauer, Pengutronix * Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde <[email protected]> * Copyright (c) 2014 David Jander, Protonic Holland * Copyright (C) 2022 Amarula Solutions, Dario Binacchi <[email protected]> * * Based on code originally by Andrey Volkov <[email protected]> * */ #ifndef _FLEXCAN_H #define _FLEXCAN_H #include <linux/can/rx-offload.h> /* FLEXCAN hardware feature flags * * Below is some version info we got: * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB * Filter? connected? Passive detection ption in MB Supported? * MCF5441X FlexCAN2 ? no yes no no no no 16 * MX25 FlexCAN2 03.00.00.00 no no no no no no 64 * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64 * MX35 FlexCAN2 03.00.00.00 no no no no no no 64 * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64 * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64 * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64 * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64 * VF610 FlexCAN3 ? no yes no yes yes? no 64 * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64 * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64 * * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. */ /* [TR]WRN_INT not connected */ #define FLEXCAN_QUIRK_BROKEN_WERR_STATE … /* Disable RX FIFO Global mask */ #define FLEXCAN_QUIRK_DISABLE_RXFG … /* Enable EACEN and RRS bit in ctrl2 */ #define FLEXCAN_QUIRK_ENABLE_EACEN_RRS … /* Disable non-correctable errors interrupt and freeze mode */ #define FLEXCAN_QUIRK_DISABLE_MECR … /* Use mailboxes (not FIFO) for RX path */ #define FLEXCAN_QUIRK_USE_RX_MAILBOX … /* No interrupt for error passive */ #define FLEXCAN_QUIRK_BROKEN_PERR_STATE … /* default to BE register access */ #define FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN … /* Setup stop mode with GPR to support wakeup */ #define FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR … /* Support CAN-FD mode */ #define FLEXCAN_QUIRK_SUPPORT_FD … /* support memory detection and correction */ #define FLEXCAN_QUIRK_SUPPORT_ECC … /* Setup stop mode with SCU firmware to support wakeup */ #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW … /* Setup 3 separate interrupts, main, boff and err */ #define FLEXCAN_QUIRK_NR_IRQ_3 … /* Setup 16 mailboxes */ #define FLEXCAN_QUIRK_NR_MB_16 … /* Device supports RX via mailboxes */ #define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX … /* Device supports RTR reception via mailboxes */ #define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR … /* Device supports RX via FIFO */ #define FLEXCAN_QUIRK_SUPPORT_RX_FIFO … /* Setup stop mode with ATF SCMI protocol to support wakeup */ #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI … struct flexcan_devtype_data { … }; struct flexcan_stop_mode { … }; struct flexcan_priv { … }; extern const struct ethtool_ops flexcan_ethtool_ops; static inline bool flexcan_supports_rx_mailbox(const struct flexcan_priv *priv) { … } static inline bool flexcan_supports_rx_mailbox_rtr(const struct flexcan_priv *priv) { … } static inline bool flexcan_supports_rx_fifo(const struct flexcan_priv *priv) { … } static inline bool flexcan_active_rx_rtr(const struct flexcan_priv *priv) { … } #endif /* _FLEXCAN_H */
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