/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. * * Derived from Intel e1000 driver * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. */ #ifndef _ATL1C_H_ #define _ATL1C_H_ #include <linux/interrupt.h> #include <linux/types.h> #include <linux/errno.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/skbuff.h> #include <linux/ioport.h> #include <linux/slab.h> #include <linux/list.h> #include <linux/delay.h> #include <linux/sched.h> #include <linux/in.h> #include <linux/ip.h> #include <linux/ipv6.h> #include <linux/udp.h> #include <linux/mii.h> #include <linux/io.h> #include <linux/vmalloc.h> #include <linux/pagemap.h> #include <linux/tcp.h> #include <linux/ethtool.h> #include <linux/if_vlan.h> #include <linux/workqueue.h> #include <net/checksum.h> #include <net/ip6_checksum.h> #include "atl1c_hw.h" /* Wake Up Filter Control */ #define AT_WUFC_LNKC … #define AT_WUFC_MAG … #define AT_WUFC_EX … #define AT_WUFC_MC … #define AT_WUFC_BC … #define AT_VLAN_TO_TAG(_vlan, _tag) … #define AT_TAG_TO_VLAN(_tag, _vlan) … #define SPEED_0 … #define HALF_DUPLEX … #define FULL_DUPLEX … #define AT_RX_BUF_SIZE … #define MAX_JUMBO_FRAME_SIZE … #define AT_MAX_RECEIVE_QUEUE … #define AT_DEF_RECEIVE_QUEUE … #define AT_MAX_TRANSMIT_QUEUE … #define AT_DMA_HI_ADDR_MASK … #define AT_DMA_LO_ADDR_MASK … #define AT_TX_WATCHDOG … #define AT_MAX_INT_WORK … #define AT_TWSI_EEPROM_TIMEOUT … #define AT_HW_MAX_IDLE_DELAY … #define AT_SUSPEND_LINK_TIMEOUT … #define AT_ASPM_L0S_TIMER … #define AT_ASPM_L1_TIMER … #define AT_LCKDET_TIMER … #define ATL1C_PCIE_L0S_L1_DISABLE … #define ATL1C_PCIE_PHY_RESET … #define ATL1C_ASPM_L0s_ENABLE … #define ATL1C_ASPM_L1_ENABLE … #define AT_REGS_LEN … #define AT_EEPROM_LEN … #define ATL1C_GET_DESC(R, i, type) … #define ATL1C_RFD_DESC(R, i) … #define ATL1C_TPD_DESC(R, i) … #define ATL1C_RRD_DESC(R, i) … /* tpd word 1 bit 0:7 General Checksum task offload */ #define TPD_L4HDR_OFFSET_MASK … #define TPD_L4HDR_OFFSET_SHIFT … /* tpd word 1 bit 0:7 Large Send task offload (IPv4/IPV6) */ #define TPD_TCPHDR_OFFSET_MASK … #define TPD_TCPHDR_OFFSET_SHIFT … /* tpd word 1 bit 0:7 Custom Checksum task offload */ #define TPD_PLOADOFFSET_MASK … #define TPD_PLOADOFFSET_SHIFT … /* tpd word 1 bit 8:17 */ #define TPD_CCSUM_EN_MASK … #define TPD_CCSUM_EN_SHIFT … #define TPD_IP_CSUM_MASK … #define TPD_IP_CSUM_SHIFT … #define TPD_TCP_CSUM_MASK … #define TPD_TCP_CSUM_SHIFT … #define TPD_UDP_CSUM_MASK … #define TPD_UDP_CSUM_SHIFT … #define TPD_LSO_EN_MASK … #define TPD_LSO_EN_SHIFT … #define TPD_LSO_VER_MASK … #define TPD_LSO_VER_SHIFT … #define TPD_CON_VTAG_MASK … #define TPD_CON_VTAG_SHIFT … #define TPD_INS_VTAG_MASK … #define TPD_INS_VTAG_SHIFT … #define TPD_IPV4_PACKET_MASK … #define TPD_IPV4_PACKET_SHIFT … #define TPD_ETH_TYPE_MASK … #define TPD_ETH_TYPE_SHIFT … /* tpd word 18:25 Custom Checksum task offload */ #define TPD_CCSUM_OFFSET_MASK … #define TPD_CCSUM_OFFSET_SHIFT … #define TPD_CCSUM_EPAD_MASK … #define TPD_CCSUM_EPAD_SHIFT … /* tpd word 18:30 Large Send task offload (IPv4/IPV6) */ #define TPD_MSS_MASK … #define TPD_MSS_SHIFT … #define TPD_EOP_MASK … #define TPD_EOP_SHIFT … struct atl1c_tpd_desc { … }; struct atl1c_tpd_ext_desc { … }; /* rrs word 0 bit 0:31 */ #define RRS_RX_CSUM_MASK … #define RRS_RX_CSUM_SHIFT … #define RRS_RX_RFD_CNT_MASK … #define RRS_RX_RFD_CNT_SHIFT … #define RRS_RX_RFD_INDEX_MASK … #define RRS_RX_RFD_INDEX_SHIFT … /* rrs flag bit 0:16 */ #define RRS_HEAD_LEN_MASK … #define RRS_HEAD_LEN_SHIFT … #define RRS_HDS_TYPE_MASK … #define RRS_HDS_TYPE_SHIFT … #define RRS_CPU_NUM_MASK … #define RRS_CPU_NUM_SHIFT … #define RRS_HASH_FLG_MASK … #define RRS_HASH_FLG_SHIFT … #define RRS_HDS_TYPE_HEAD … #define RRS_HDS_TYPE_DATA … #define RRS_IS_NO_HDS_TYPE(flag) … #define RRS_IS_HDS_HEAD(flag) … #define RRS_IS_HDS_DATA(flag) … /* rrs word 3 bit 0:31 */ #define RRS_PKT_SIZE_MASK … #define RRS_PKT_SIZE_SHIFT … #define RRS_ERR_L4_CSUM_MASK … #define RRS_ERR_L4_CSUM_SHIFT … #define RRS_ERR_IP_CSUM_MASK … #define RRS_ERR_IP_CSUM_SHIFT … #define RRS_VLAN_INS_MASK … #define RRS_VLAN_INS_SHIFT … #define RRS_PROT_ID_MASK … #define RRS_PROT_ID_SHIFT … #define RRS_RX_ERR_SUM_MASK … #define RRS_RX_ERR_SUM_SHIFT … #define RRS_RX_ERR_CRC_MASK … #define RRS_RX_ERR_CRC_SHIFT … #define RRS_RX_ERR_FAE_MASK … #define RRS_RX_ERR_FAE_SHIFT … #define RRS_RX_ERR_TRUNC_MASK … #define RRS_RX_ERR_TRUNC_SHIFT … #define RRS_RX_ERR_RUNC_MASK … #define RRS_RX_ERR_RUNC_SHIFT … #define RRS_RX_ERR_ICMP_MASK … #define RRS_RX_ERR_ICMP_SHIFT … #define RRS_PACKET_BCAST_MASK … #define RRS_PACKET_BCAST_SHIFT … #define RRS_PACKET_MCAST_MASK … #define RRS_PACKET_MCAST_SHIFT … #define RRS_PACKET_TYPE_MASK … #define RRS_PACKET_TYPE_SHIFT … #define RRS_FIFO_FULL_MASK … #define RRS_FIFO_FULL_SHIFT … #define RRS_802_3_LEN_ERR_MASK … #define RRS_802_3_LEN_ERR_SHIFT … #define RRS_RXD_UPDATED_MASK … #define RRS_RXD_UPDATED_SHIFT … #define RRS_ERR_L4_CSUM … #define RRS_ERR_IP_CSUM … #define RRS_VLAN_INS … #define RRS_RX_ERR_SUM … #define RRS_RX_ERR_CRC … #define RRS_802_3_LEN_ERR … #define RRS_RXD_UPDATED … #define RRS_PACKET_TYPE_802_3 … #define RRS_PACKET_TYPE_ETH … #define RRS_PACKET_IS_ETH(word) … #define RRS_RXD_IS_VALID(word) … #define RRS_PACKET_PROT_IS_IPV4_ONLY(word) … #define RRS_PACKET_PROT_IS_IPV6_ONLY(word) … #define RRS_MT_PROT_ID_TCPUDP … struct atl1c_recv_ret_status { … }; /* RFD descriptor */ struct atl1c_rx_free_desc { … }; /* DMA Order Settings */ enum atl1c_dma_order { … }; enum atl1c_dma_rcb { … }; enum atl1c_mac_speed { … }; enum atl1c_dma_req_block { … }; enum atl1c_nic_type { … }; struct atl1c_hw_stats { … }; struct atl1c_hw { … }; /* * atl1c_ring_header represents a single, contiguous block of DMA space * mapped for the three descriptor rings (tpd, rfd, rrd) described below */ struct atl1c_ring_header { … }; /* * atl1c_buffer is wrapper around a pointer to a socket buffer * so a DMA handle can be stored along with the skb */ struct atl1c_buffer { … }; #define ATL1C_SET_BUFFER_STATE(buff, state) … #define ATL1C_SET_PCIMAP_TYPE(buff, type, direction) … /* transimit packet descriptor (tpd) ring */ struct atl1c_tpd_ring { … }; /* receive free descriptor (rfd) ring */ struct atl1c_rfd_ring { … }; /* receive return descriptor (rrd) ring */ struct atl1c_rrd_ring { … }; /* board specific private data structure */ struct atl1c_adapter { … }; #define AT_WRITE_REG(a, reg, value) … #define AT_WRITE_FLUSH(a) … #define AT_READ_REG(a, reg, pdata) … #define AT_WRITE_REGB(a, reg, value) … #define AT_READ_REGB(a, reg) … #define AT_WRITE_REGW(a, reg, value) … #define AT_READ_REGW(a, reg, pdata) … #define AT_WRITE_REG_ARRAY(a, reg, offset, value) … #define AT_READ_REG_ARRAY(a, reg, offset) … extern char atl1c_driver_name[]; void atl1c_reinit_locked(struct atl1c_adapter *adapter); s32 atl1c_reset_hw(struct atl1c_hw *hw); void atl1c_set_ethtool_ops(struct net_device *netdev); #endif /* _ATL1C_H_ */
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