// SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 1999 - 2018 Intel Corporation. */ #include "ixgbe.h" #include <linux/ptp_classify.h> #include <linux/clocksource.h> /* * The 82599 and the X540 do not have true 64bit nanosecond scale * counter registers. Instead, SYSTIME is defined by a fixed point * system which allows the user to define the scale counter increment * value at every level change of the oscillator driving the SYSTIME * value. For both devices the TIMINCA:IV field defines this * increment. On the X540 device, 31 bits are provided. However on the * 82599 only provides 24 bits. The time unit is determined by the * clock frequency of the oscillator in combination with the TIMINCA * register. When these devices link at 10Gb the oscillator has a * period of 6.4ns. In order to convert the scale counter into * nanoseconds the cyclecounter and timecounter structures are * used. The SYSTIME registers need to be converted to ns values by use * of only a right shift (division by power of 2). The following math * determines the largest incvalue that will fit into the available * bits in the TIMINCA register. * * PeriodWidth: Number of bits to store the clock period * MaxWidth: The maximum width value of the TIMINCA register * Period: The clock period for the oscillator * round(): discard the fractional portion of the calculation * * Period * [ 2 ^ ( MaxWidth - PeriodWidth ) ] * * For the X540, MaxWidth is 31 bits, and the base period is 6.4 ns * For the 82599, MaxWidth is 24 bits, and the base period is 6.4 ns * * The period also changes based on the link speed: * At 10Gb link or no link, the period remains the same. * At 1Gb link, the period is multiplied by 10. (64ns) * At 100Mb link, the period is multiplied by 100. (640ns) * * The calculated value allows us to right shift the SYSTIME register * value in order to quickly convert it into a nanosecond clock, * while allowing for the maximum possible adjustment value. * * These diagrams are only for the 10Gb link period * * SYSTIMEH SYSTIMEL * +--------------+ +--------------+ * X540 | 32 | | 1 | 3 | 28 | * *--------------+ +--------------+ * \________ 36 bits ______/ fract * * +--------------+ +--------------+ * 82599 | 32 | | 8 | 3 | 21 | * *--------------+ +--------------+ * \________ 43 bits ______/ fract * * The 36 bit X540 SYSTIME overflows every * 2^36 * 10^-9 / 60 = 1.14 minutes or 69 seconds * * The 43 bit 82599 SYSTIME overflows every * 2^43 * 10^-9 / 3600 = 2.4 hours */ #define IXGBE_INCVAL_10GB … #define IXGBE_INCVAL_1GB … #define IXGBE_INCVAL_100 … #define IXGBE_INCVAL_SHIFT_10GB … #define IXGBE_INCVAL_SHIFT_1GB … #define IXGBE_INCVAL_SHIFT_100 … #define IXGBE_INCVAL_SHIFT_82599 … #define IXGBE_INCPER_SHIFT_82599 … #define IXGBE_OVERFLOW_PERIOD … #define IXGBE_PTP_TX_TIMEOUT … /* We use our own definitions instead of NSEC_PER_SEC because we want to mark * the value as a ULL to force precision when bit shifting. */ #define NS_PER_SEC … #define NS_PER_HALF_SEC … /* In contrast, the X550 controller has two registers, SYSTIMEH and SYSTIMEL * which contain measurements of seconds and nanoseconds respectively. This * matches the standard linux representation of time in the kernel. In addition, * the X550 also has a SYSTIMER register which represents residue, or * subnanosecond overflow adjustments. To control clock adjustment, the TIMINCA * register is used, but it is unlike the X540 and 82599 devices. TIMINCA * represents units of 2^-32 nanoseconds, and uses 31 bits for this, with the * high bit representing whether the adjustent is positive or negative. Every * clock cycle, the X550 will add 12.5 ns + TIMINCA which can result in a range * of 12 to 13 nanoseconds adjustment. Unlike the 82599 and X540 devices, the * X550's clock for purposes of SYSTIME generation is constant and not dependent * on the link speed. * * SYSTIMEH SYSTIMEL SYSTIMER * +--------------+ +--------------+ +-------------+ * X550 | 32 | | 32 | | 32 | * *--------------+ +--------------+ +-------------+ * \____seconds___/ \_nanoseconds_/ \__2^-32 ns__/ * * This results in a full 96 bits to represent the clock, with 32 bits for * seconds, 32 bits for nanoseconds (largest value is 0d999999999 or just under * 1 second) and an additional 32 bits to measure sub nanosecond adjustments for * underflow of adjustments. * * The 32 bits of seconds for the X550 overflows every * 2^32 / ( 365.25 * 24 * 60 * 60 ) = ~136 years. * * In order to adjust the clock frequency for the X550, the TIMINCA register is * provided. This register represents a + or minus nearly 0.5 ns adjustment to * the base frequency. It is measured in 2^-32 ns units, with the high bit being * the sign bit. This register enables software to calculate frequency * adjustments and apply them directly to the clock rate. * * The math for converting scaled_ppm into TIMINCA values is fairly * straightforward. * * TIMINCA value = ( Base_Frequency * scaled_ppm ) / 1000000ULL << 16 * * To avoid overflow, we simply use mul_u64_u64_div_u64. * * This assumes that scaled_ppm is never high enough to create a value bigger * than TIMINCA's 31 bits can store. This is ensured by the stack, and is * measured in parts per billion. Calculating this value is also simple. * Max ppb = ( Max Adjustment / Base Frequency ) / 1000000000ULL * * For the X550, the Max adjustment is +/- 0.5 ns, and the base frequency is * 12.5 nanoseconds. This means that the Max ppb is 39999999 * Note: We subtract one in order to ensure no overflow, because the TIMINCA * register can only hold slightly under 0.5 nanoseconds. * * Because TIMINCA is measured in 2^-32 ns units, we have to convert 12.5 ns * into 2^-32 units, which is * * 12.5 * 2^32 = C80000000 * * Some revisions of hardware have a faster base frequency than the registers * were defined for. To fix this, we use a timecounter structure with the * proper mult and shift to convert the cycles into nanoseconds of time. */ #define IXGBE_X550_BASE_PERIOD … #define INCVALUE_MASK … #define ISGN … /** * ixgbe_ptp_setup_sdp_X540 * @adapter: private adapter structure * * this function enables or disables the clock out feature on SDP0 for * the X540 device. It will create a 1 second periodic output that can * be used as the PPS (via an interrupt). * * It calculates when the system time will be on an exact second, and then * aligns the start of the PPS signal to that value. * * This works by using the cycle counter shift and mult values in reverse, and * assumes that the values we're shifting will not overflow. */ static void ixgbe_ptp_setup_sdp_X540(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_setup_sdp_X550 * @adapter: private adapter structure * * Enable or disable a clock output signal on SDP 0 for X550 hardware. * * Use the target time feature to align the output signal on the next full * second. * * This works by using the cycle counter shift and mult values in reverse, and * assumes that the values we're shifting will not overflow. */ static void ixgbe_ptp_setup_sdp_X550(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_read_X550 - read cycle counter value * @cc: cyclecounter structure * * This function reads SYSTIME registers. It is called by the cyclecounter * structure to convert from internal representation into nanoseconds. We need * this for X550 since some skews do not have expected clock frequency and * result of SYSTIME is 32bits of "billions of cycles" and 32 bits of * "cycles", rather than seconds and nanoseconds. */ static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc) { … } /** * ixgbe_ptp_read_82599 - read raw cycle counter (to be used by time counter) * @cc: the cyclecounter structure * * this function reads the cyclecounter registers and is called by the * cyclecounter structure used to construct a ns counter from the * arbitrary fixed point registers */ static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc) { … } /** * ixgbe_ptp_convert_to_hwtstamp - convert register value to hw timestamp * @adapter: private adapter structure * @hwtstamp: stack timestamp structure * @timestamp: unsigned 64bit system time value * * We need to convert the adapter's RX/TXSTMP registers into a hwtstamp value * which can be used by the stack's ptp functions. * * The lock is used to protect consistency of the cyclecounter and the SYSTIME * registers. However, it does not need to protect against the Rx or Tx * timestamp registers, as there can't be a new timestamp until the old one is * unlatched by reading. * * In addition to the timestamp in hardware, some controllers need a software * overflow cyclecounter, and this function takes this into account as well. **/ static void ixgbe_ptp_convert_to_hwtstamp(struct ixgbe_adapter *adapter, struct skb_shared_hwtstamps *hwtstamp, u64 timestamp) { … } /** * ixgbe_ptp_adjfine_82599 * @ptp: the ptp clock structure * @scaled_ppm: scaled parts per million adjustment from base * * Adjust the frequency of the ptp cycle counter by the * indicated scaled_ppm from the base frequency. * * Scaled parts per million is ppm with a 16-bit binary fractional field. */ static int ixgbe_ptp_adjfine_82599(struct ptp_clock_info *ptp, long scaled_ppm) { … } /** * ixgbe_ptp_adjfine_X550 * @ptp: the ptp clock structure * @scaled_ppm: scaled parts per million adjustment from base * * Adjust the frequency of the SYSTIME registers by the indicated scaled_ppm * from base frequency. * * Scaled parts per million is ppm with a 16-bit binary fractional field. */ static int ixgbe_ptp_adjfine_X550(struct ptp_clock_info *ptp, long scaled_ppm) { … } /** * ixgbe_ptp_adjtime * @ptp: the ptp clock structure * @delta: offset to adjust the cycle counter by * * adjust the timer by resetting the timecounter structure. */ static int ixgbe_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { … } /** * ixgbe_ptp_gettimex * @ptp: the ptp clock structure * @ts: timespec to hold the PHC timestamp * @sts: structure to hold the system time before and after reading the PHC * * read the timecounter and return the correct value on ns, * after converting it into a struct timespec. */ static int ixgbe_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts, struct ptp_system_timestamp *sts) { … } /** * ixgbe_ptp_settime * @ptp: the ptp clock structure * @ts: the timespec containing the new time for the cycle counter * * reset the timecounter to use a new base value instead of the kernel * wall timer value. */ static int ixgbe_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { … } /** * ixgbe_ptp_feature_enable * @ptp: the ptp clock structure * @rq: the requested feature to change * @on: whether to enable or disable the feature * * enable (or disable) ancillary features of the phc subsystem. * our driver only supports the PPS feature on the X540 */ static int ixgbe_ptp_feature_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } /** * ixgbe_ptp_check_pps_event * @adapter: the private adapter structure * * This function is called by the interrupt routine when checking for * interrupts. It will check and handle a pps event. */ void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_overflow_check - watchdog task to detect SYSTIME overflow * @adapter: private adapter struct * * this watchdog task periodically reads the timecounter * in order to prevent missing when the system time registers wrap * around. This needs to be run approximately twice a minute. */ void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_rx_hang - detect error case when Rx timestamp registers latched * @adapter: private network adapter structure * * this watchdog task is scheduled to detect error case where hardware has * dropped an Rx packet that was timestamped when the ring is full. The * particular error is rare but leaves the device in a state unable to timestamp * any future packets. */ void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_clear_tx_timestamp - utility function to clear Tx timestamp state * @adapter: the private adapter structure * * This function should be called whenever the state related to a Tx timestamp * needs to be cleared. This helps ensure that all related bits are reset for * the next Tx timestamp event. */ static void ixgbe_ptp_clear_tx_timestamp(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_tx_hang - detect error case where Tx timestamp never finishes * @adapter: private network adapter structure */ void ixgbe_ptp_tx_hang(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_tx_hwtstamp - utility function which checks for TX time stamp * @adapter: the private adapter struct * * if the timestamp is valid, we convert it into the timecounter ns * value, then store that result into the shhwtstamps structure which * is passed up the network stack */ static void ixgbe_ptp_tx_hwtstamp(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_tx_hwtstamp_work * @work: pointer to the work struct * * This work item polls TSYNCTXCTL valid bit to determine when a Tx hardware * timestamp has been taken for the current skb. It is necessary, because the * descriptor's "done" bit does not correlate with the timestamp event. */ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work) { … } /** * ixgbe_ptp_rx_pktstamp - utility function to get RX time stamp from buffer * @q_vector: structure containing interrupt and ring information * @skb: the packet * * This function will be called by the Rx routine of the timestamp for this * packet is stored in the buffer. The value is stored in little endian format * starting at the end of the packet data. */ void ixgbe_ptp_rx_pktstamp(struct ixgbe_q_vector *q_vector, struct sk_buff *skb) { … } /** * ixgbe_ptp_rx_rgtstamp - utility function which checks for RX time stamp * @q_vector: structure containing interrupt and ring information * @skb: particular skb to send timestamp with * * if the timestamp is valid, we convert it into the timecounter ns * value, then store that result into the shhwtstamps structure which * is passed up the network stack */ void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *q_vector, struct sk_buff *skb) { … } /** * ixgbe_ptp_get_ts_config - get current hardware timestamping configuration * @adapter: pointer to adapter structure * @ifr: ioctl data * * This function returns the current timestamping settings. Rather than * attempt to deconstruct registers to fill in the values, simply keep a copy * of the old settings around, and return a copy when requested. */ int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) { … } /** * ixgbe_ptp_set_timestamp_mode - setup the hardware for the requested mode * @adapter: the private ixgbe adapter structure * @config: the hwtstamp configuration requested * * Outgoing time stamping can be enabled and disabled. Play nice and * disable it when requested, although it shouldn't cause any overhead * when no packet needs it. At most one packet in the queue may be * marked for time stamping, otherwise it would be impossible to tell * for sure to which packet the hardware time stamp belongs. * * Incoming time stamping has to be configured via the hardware * filters. Not all combinations are supported, in particular event * type has to be specified. Matching the kind of event packet is * not supported, with the exception of "all V2 events regardless of * level 2 or 4". * * Since hardware always timestamps Path delay packets when timestamping V2 * packets, regardless of the type specified in the register, only use V2 * Event mode. This more accurately tells the user what the hardware is going * to do anyways. * * Note: this may modify the hwtstamp configuration towards a more general * mode, if required to support the specifically requested mode. */ static int ixgbe_ptp_set_timestamp_mode(struct ixgbe_adapter *adapter, struct hwtstamp_config *config) { … } /** * ixgbe_ptp_set_ts_config - user entry point for timestamp mode * @adapter: pointer to adapter struct * @ifr: ioctl data * * Set hardware to requested mode. If unsupported, return an error with no * changes. Otherwise, store the mode for future reference. */ int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) { … } static void ixgbe_ptp_link_speed_adjust(struct ixgbe_adapter *adapter, u32 *shift, u32 *incval) { … } /** * ixgbe_ptp_start_cyclecounter - create the cycle counter from hw * @adapter: pointer to the adapter structure * * This function should be called to set the proper values for the TIMINCA * register and tell the cyclecounter structure what the tick rate of SYSTIME * is. It does not directly modify SYSTIME registers or the timecounter * structure. It should be called whenever a new TIMINCA value is necessary, * such as during initialization or when the link speed changes. */ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_init_systime - Initialize SYSTIME registers * @adapter: the ixgbe private board structure * * Initialize and start the SYSTIME registers. */ static void ixgbe_ptp_init_systime(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_reset * @adapter: the ixgbe private board structure * * When the MAC resets, all the hardware bits for timesync are reset. This * function is used to re-enable the device for PTP based on current settings. * We do lose the current clock time, so just reset the cyclecounter to the * system real clock time. * * This function will maintain hwtstamp_config settings, and resets the SDP * output if it was enabled. */ void ixgbe_ptp_reset(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_create_clock * @adapter: the ixgbe private adapter structure * * This function performs setup of the user entry point function table and * initializes the PTP clock device, which is used to access the clock-like * features of the PTP core. It will be called by ixgbe_ptp_init, and may * reuse a previously initialized clock (such as during a suspend/resume * cycle). */ static long ixgbe_ptp_create_clock(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_init * @adapter: the ixgbe private adapter structure * * This function performs the required steps for enabling PTP * support. If PTP support has already been loaded it simply calls the * cyclecounter init routine and exits. */ void ixgbe_ptp_init(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_suspend - stop PTP work items * @adapter: pointer to adapter struct * * this function suspends PTP activity, and prevents more PTP work from being * generated, but does not destroy the PTP clock device. */ void ixgbe_ptp_suspend(struct ixgbe_adapter *adapter) { … } /** * ixgbe_ptp_stop - close the PTP device * @adapter: pointer to adapter struct * * completely destroy the PTP device, should only be called when the device is * being fully closed. */ void ixgbe_ptp_stop(struct ixgbe_adapter *adapter) { … }
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