// SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2018 Intel Corporation. */ #include <linux/ptp_classify.h> #include <linux/posix-clock.h> #include "i40e.h" #include "i40e_devids.h" /* The XL710 timesync is very much like Intel's 82599 design when it comes to * the fundamental clock design. However, the clock operations are much simpler * in the XL710 because the device supports a full 64 bits of nanoseconds. * Because the field is so wide, we can forgo the cycle counter and just * operate with the nanosecond field directly without fear of overflow. * * Much like the 82599, the update period is dependent upon the link speed: * At 40Gb, 25Gb, or no link, the period is 1.6ns. * At 10Gb or 5Gb link, the period is multiplied by 2. (3.2ns) * At 1Gb link, the period is multiplied by 20. (32ns) * 1588 functionality is not supported at 100Mbps. */ #define I40E_PTP_40GB_INCVAL … #define I40E_PTP_10GB_INCVAL_MULT … #define I40E_PTP_5GB_INCVAL_MULT … #define I40E_PTP_1GB_INCVAL_MULT … #define I40E_ISGN … #define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 … #define I40E_PRTTSYN_CTL1_TSYNTYPE_V2 … #define I40E_SUBDEV_ID_25G_PTP_PIN … enum i40e_ptp_pin { … }; enum i40e_can_set_pins { … }; static struct ptp_pin_desc sdp_desc[] = …; enum i40e_ptp_gpio_pin_state { … }; static const char * const i40e_ptp_gpio_pin_state2str[] = …; enum i40e_ptp_led_pin_state { … }; struct i40e_ptp_pins_settings { … }; static const struct i40e_ptp_pins_settings i40e_ptp_pin_led_allowed_states[] = …; static int i40e_ptp_set_pins(struct i40e_pf *pf, struct i40e_ptp_pins_settings *pins); /** * i40e_ptp_extts0_work - workqueue task function * @work: workqueue task structure * * Service for PTP external clock event **/ static void i40e_ptp_extts0_work(struct work_struct *work) { … } /** * i40e_is_ptp_pin_dev - check if device supports PTP pins * @hw: pointer to the hardware structure * * Return true if device supports PTP pins, false otherwise. **/ static bool i40e_is_ptp_pin_dev(struct i40e_hw *hw) { … } /** * i40e_can_set_pins - check possibility of manipulating the pins * @pf: board private structure * * Check if all conditions are satisfied to manipulate PTP pins. * Return CAN_SET_PINS if pins can be set on a specific PF or * return CAN_DO_PINS if pins can be manipulated within a NIC or * return CANT_DO_PINS otherwise. **/ static enum i40e_can_set_pins i40e_can_set_pins(struct i40e_pf *pf) { … } /** * i40_ptp_reset_timing_events - Reset PTP timing events * @pf: Board private structure * * This function resets timing events for pf. **/ static void i40_ptp_reset_timing_events(struct i40e_pf *pf) { … } /** * i40e_ptp_verify - check pins * @ptp: ptp clock * @pin: pin index * @func: assigned function * @chan: channel * * Check pins consistency. * Return 0 on success or error on failure. **/ static int i40e_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin, enum ptp_pin_function func, unsigned int chan) { … } /** * i40e_ptp_read - Read the PHC time from the device * @pf: Board private structure * @ts: timespec structure to hold the current time value * @sts: structure to hold the system time before and after reading the PHC * * This function reads the PRTTSYN_TIME registers and stores them in a * timespec. However, since the registers are 64 bits of nanoseconds, we must * convert the result to a timespec before we can return. **/ static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts, struct ptp_system_timestamp *sts) { … } /** * i40e_ptp_write - Write the PHC time to the device * @pf: Board private structure * @ts: timespec structure that holds the new time value * * This function writes the PRTTSYN_TIME registers with the user value. Since * we receive a timespec from the stack, we must convert that timespec into * nanoseconds before programming the registers. **/ static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts) { … } /** * i40e_ptp_convert_to_hwtstamp - Convert device clock to system time * @hwtstamps: Timestamp structure to update * @timestamp: Timestamp from the hardware * * We need to convert the NIC clock value into a hwtstamp which can be used by * the upper level timestamping functions. Since the timestamp is simply a 64- * bit nanosecond value, we can call ns_to_ktime directly to handle this. **/ static void i40e_ptp_convert_to_hwtstamp(struct skb_shared_hwtstamps *hwtstamps, u64 timestamp) { … } /** * i40e_ptp_adjfine - Adjust the PHC frequency * @ptp: The PTP clock structure * @scaled_ppm: Scaled parts per million adjustment from base * * Adjust the frequency of the PHC by the indicated delta from the base * frequency. * * Scaled parts per million is ppm with a 16 bit binary fractional field. **/ static int i40e_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { … } /** * i40e_ptp_set_1pps_signal_hw - configure 1PPS PTP signal for pins * @pf: the PF private data structure * * Configure 1PPS signal used for PTP pins **/ static void i40e_ptp_set_1pps_signal_hw(struct i40e_pf *pf) { … } /** * i40e_ptp_adjtime - Adjust the PHC time * @ptp: The PTP clock structure * @delta: Offset in nanoseconds to adjust the PHC time by * * Adjust the current clock time by a delta specified in nanoseconds. **/ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { … } /** * i40e_ptp_gettimex - Get the time of the PHC * @ptp: The PTP clock structure * @ts: timespec structure to hold the current time value * @sts: structure to hold the system time before and after reading the PHC * * Read the device clock and return the correct value on ns, after converting it * into a timespec struct. **/ static int i40e_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts, struct ptp_system_timestamp *sts) { … } /** * i40e_ptp_settime - Set the time of the PHC * @ptp: The PTP clock structure * @ts: timespec64 structure that holds the new time value * * Set the device clock to the user input value. The conversion from timespec * to ns happens in the write function. **/ static int i40e_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { … } /** * i40e_pps_configure - configure PPS events * @ptp: ptp clock * @rq: clock request * @on: status * * Configure PPS events for external clock source. * Return 0 on success or error on failure. **/ static int i40e_pps_configure(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } /** * i40e_pin_state - determine PIN state * @index: PIN index * @func: function assigned to PIN * * Determine PIN state based on PIN index and function assigned. * Return PIN state. **/ static enum i40e_ptp_gpio_pin_state i40e_pin_state(int index, int func) { … } /** * i40e_ptp_enable_pin - enable PINs. * @pf: private board structure * @chan: channel * @func: PIN function * @on: state * * Enable PTP pins for external clock source. * Return 0 on success or error code on failure. **/ static int i40e_ptp_enable_pin(struct i40e_pf *pf, unsigned int chan, enum ptp_pin_function func, int on) { … } /** * i40e_ptp_feature_enable - Enable external clock pins * @ptp: The PTP clock structure * @rq: The PTP clock request structure * @on: To turn feature on/off * * Setting on/off PTP PPS feature for pin. **/ static int i40e_ptp_feature_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } /** * i40e_ptp_get_rx_events - Read I40E_PRTTSYN_STAT_1 and latch events * @pf: the PF data structure * * This function reads I40E_PRTTSYN_STAT_1 and updates the corresponding timers * for noticed latch events. This allows the driver to keep track of the first * time a latch event was noticed which will be used to help clear out Rx * timestamps for packets that got dropped or lost. * * This function will return the current value of I40E_PRTTSYN_STAT_1 and is * expected to be called only while under the ptp_rx_lock. **/ static u32 i40e_ptp_get_rx_events(struct i40e_pf *pf) { … } /** * i40e_ptp_rx_hang - Detect error case when Rx timestamp registers are hung * @pf: The PF private data structure * * This watchdog task is scheduled to detect error case where hardware has * dropped an Rx packet that was timestamped when the ring is full. The * particular error is rare but leaves the device in a state unable to timestamp * any future packets. **/ void i40e_ptp_rx_hang(struct i40e_pf *pf) { … } /** * i40e_ptp_tx_hang - Detect error case when Tx timestamp register is hung * @pf: The PF private data structure * * This watchdog task is run periodically to make sure that we clear the Tx * timestamp logic if we don't obtain a timestamp in a reasonable amount of * time. It is unexpected in the normal case but if it occurs it results in * permanently preventing timestamps of future packets. **/ void i40e_ptp_tx_hang(struct i40e_pf *pf) { … } /** * i40e_ptp_tx_hwtstamp - Utility function which returns the Tx timestamp * @pf: Board private structure * * Read the value of the Tx timestamp from the registers, convert it into a * value consumable by the stack, and store that result into the shhwtstamps * struct before returning it up the stack. **/ void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf) { … } /** * i40e_ptp_rx_hwtstamp - Utility function which checks for an Rx timestamp * @pf: Board private structure * @skb: Particular skb to send timestamp with * @index: Index into the receive timestamp registers for the timestamp * * The XL710 receives a notification in the receive descriptor with an offset * into the set of RXTIME registers where the timestamp is for that skb. This * function goes and fetches the receive timestamp from that offset, if a valid * one exists. The RXTIME registers are in ns, so we must convert the result * first. **/ void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index) { … } /** * i40e_ptp_set_increment - Utility function to update clock increment rate * @pf: Board private structure * * During a link change, the DMA frequency that drives the 1588 logic will * change. In order to keep the PRTTSYN_TIME registers in units of nanoseconds, * we must update the increment value per clock tick. **/ void i40e_ptp_set_increment(struct i40e_pf *pf) { … } /** * i40e_ptp_get_ts_config - ioctl interface to read the HW timestamping * @pf: Board private structure * @ifr: ioctl data * * Obtain the current hardware timestamping settigs as requested. To do this, * keep a shadow copy of the timestamp settings rather than attempting to * deconstruct it from the registers. **/ int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr) { … } /** * i40e_ptp_free_pins - free memory used by PTP pins * @pf: Board private structure * * Release memory allocated for PTP pins. **/ static void i40e_ptp_free_pins(struct i40e_pf *pf) { … } /** * i40e_ptp_set_pin_hw - Set HW GPIO pin * @hw: pointer to the hardware structure * @pin: pin index * @state: pin state * * Set status of GPIO pin for external clock handling. **/ static void i40e_ptp_set_pin_hw(struct i40e_hw *hw, unsigned int pin, enum i40e_ptp_gpio_pin_state state) { … } /** * i40e_ptp_set_led_hw - Set HW GPIO led * @hw: pointer to the hardware structure * @led: led index * @state: led state * * Set status of GPIO led for external clock handling. **/ static void i40e_ptp_set_led_hw(struct i40e_hw *hw, unsigned int led, enum i40e_ptp_led_pin_state state) { … } /** * i40e_ptp_init_leds_hw - init LEDs * @hw: pointer to a hardware structure * * Set initial state of LEDs **/ static void i40e_ptp_init_leds_hw(struct i40e_hw *hw) { … } /** * i40e_ptp_set_pins_hw - Set HW GPIO pins * @pf: Board private structure * * This function sets GPIO pins for PTP **/ static void i40e_ptp_set_pins_hw(struct i40e_pf *pf) { … } /** * i40e_ptp_set_pins - set PTP pins in HW * @pf: Board private structure * @pins: PTP pins to be applied * * Validate and set PTP pins in HW for specific PF. * Return 0 on success or negative value on error. **/ static int i40e_ptp_set_pins(struct i40e_pf *pf, struct i40e_ptp_pins_settings *pins) { … } /** * i40e_ptp_alloc_pins - allocate PTP pins structure * @pf: Board private structure * * allocate PTP pins structure **/ int i40e_ptp_alloc_pins(struct i40e_pf *pf) { … } /** * i40e_ptp_set_timestamp_mode - setup hardware for requested timestamp mode * @pf: Board private structure * @config: hwtstamp settings requested or saved * * Control hardware registers to enter the specific mode requested by the * user. Also used during reset path to ensure that timestamp settings are * maintained. * * Note: modifies config in place, and may update the requested mode to be * more broad if the specific filter is not directly supported. **/ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf, struct hwtstamp_config *config) { … } /** * i40e_ptp_set_ts_config - ioctl interface to control the HW timestamping * @pf: Board private structure * @ifr: ioctl data * * Respond to the user filter requests and make the appropriate hardware * changes here. The XL710 cannot support splitting of the Tx/Rx timestamping * logic, so keep track in software of whether to indicate these timestamps * or not. * * It is permissible to "upgrade" the user request to a broader filter, as long * as the user receives the timestamps they care about and the user is notified * the filter has been broadened. **/ int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr) { … } /** * i40e_init_pin_config - initialize pins. * @pf: private board structure * * Initialize pins for external clock source. * Return 0 on success or error code on failure. **/ static int i40e_init_pin_config(struct i40e_pf *pf) { … } /** * i40e_ptp_create_clock - Create PTP clock device for userspace * @pf: Board private structure * * This function creates a new PTP clock device. It only creates one if we * don't already have one, so it is safe to call. Will return error if it * can't create one, but success if we already have a device. Should be used * by i40e_ptp_init to create clock initially, and prevent global resets from * creating new clock devices. **/ static long i40e_ptp_create_clock(struct i40e_pf *pf) { … } /** * i40e_ptp_save_hw_time - Save the current PTP time as ptp_prev_hw_time * @pf: Board private structure * * Read the current PTP time and save it into pf->ptp_prev_hw_time. This should * be called at the end of preparing to reset, just before hardware reset * occurs, in order to preserve the PTP time as close as possible across * resets. */ void i40e_ptp_save_hw_time(struct i40e_pf *pf) { … } /** * i40e_ptp_restore_hw_time - Restore the ptp_prev_hw_time + delta to PTP regs * @pf: Board private structure * * Restore the PTP hardware clock registers. We previously cached the PTP * hardware time as pf->ptp_prev_hw_time. To be as accurate as possible, * update this value based on the time delta since the time was saved, using * CLOCK_MONOTONIC (via ktime_get()) to calculate the time difference. * * This ensures that the hardware clock is restored to nearly what it should * have been if a reset had not occurred. */ void i40e_ptp_restore_hw_time(struct i40e_pf *pf) { … } /** * i40e_ptp_init - Initialize the 1588 support after device probe or reset * @pf: Board private structure * * This function sets device up for 1588 support. The first time it is run, it * will create a PHC clock device. It does not create a clock device if one * already exists. It also reconfigures the device after a reset. * * The first time a clock is created, i40e_ptp_create_clock will set * pf->ptp_prev_hw_time to the current system time. During resets, it is * expected that this timespec will be set to the last known PTP clock time, * in order to preserve the clock time as close as possible across a reset. **/ void i40e_ptp_init(struct i40e_pf *pf) { … } /** * i40e_ptp_stop - Disable the driver/hardware support and unregister the PHC * @pf: Board private structure * * This function handles the cleanup work required from the initialization by * clearing out the important information and unregistering the PHC. **/ void i40e_ptp_stop(struct i40e_pf *pf) { … }
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