/* SPDX-License-Identifier: GPL-2.0-only */ /* drivers/net/ethernet/micrel/ks8851.h * * Copyright 2009 Simtec Electronics * Ben Dooks <[email protected]> * * KS8851 register definitions */ #ifndef __KS8851_H__ #define __KS8851_H__ #include <linux/eeprom_93cx6.h> #define KS_CCR … #define CCR_LE … #define CCR_EEPROM … #define CCR_SPI … #define CCR_8BIT … #define CCR_16BIT … #define CCR_32BIT … #define CCR_SHARED … #define CCR_48PIN … #define CCR_32PIN … /* MAC address registers */ #define KS_MAR(_m) … #define KS_MARL … #define KS_MARM … #define KS_MARH … #define KS_OBCR … #define OBCR_ODS_16mA … #define KS_EEPCR … #define EEPCR_EESRWA … #define EEPCR_EESA … #define EEPCR_EESB … #define EEPCR_EEDO … #define EEPCR_EESCK … #define EEPCR_EECS … #define KS_MBIR … #define MBIR_TXMBF … #define MBIR_TXMBFA … #define MBIR_RXMBF … #define MBIR_RXMBFA … #define KS_GRR … #define GRR_QMU … #define GRR_GSR … #define KS_WFCR … #define WFCR_MPRXE … #define WFCR_WF3E … #define WFCR_WF2E … #define WFCR_WF1E … #define WFCR_WF0E … #define KS_WF0CRC0 … #define KS_WF0CRC1 … #define KS_WF0BM0 … #define KS_WF0BM1 … #define KS_WF0BM2 … #define KS_WF0BM3 … #define KS_WF1CRC0 … #define KS_WF1CRC1 … #define KS_WF1BM0 … #define KS_WF1BM1 … #define KS_WF1BM2 … #define KS_WF1BM3 … #define KS_WF2CRC0 … #define KS_WF2CRC1 … #define KS_WF2BM0 … #define KS_WF2BM1 … #define KS_WF2BM2 … #define KS_WF2BM3 … #define KS_WF3CRC0 … #define KS_WF3CRC1 … #define KS_WF3BM0 … #define KS_WF3BM1 … #define KS_WF3BM2 … #define KS_WF3BM3 … #define KS_TXCR … #define TXCR_TCGICMP … #define TXCR_TCGUDP … #define TXCR_TCGTCP … #define TXCR_TCGIP … #define TXCR_FTXQ … #define TXCR_TXFCE … #define TXCR_TXPE … #define TXCR_TXCRC … #define TXCR_TXE … #define KS_TXSR … #define TXSR_TXLC … #define TXSR_TXMC … #define TXSR_TXFID_MASK … #define TXSR_TXFID_SHIFT … #define TXSR_TXFID_GET(_v) … #define KS_RXCR1 … #define RXCR1_FRXQ … #define RXCR1_RXUDPFCC … #define RXCR1_RXTCPFCC … #define RXCR1_RXIPFCC … #define RXCR1_RXPAFMA … #define RXCR1_RXFCE … #define RXCR1_RXEFE … #define RXCR1_RXMAFMA … #define RXCR1_RXBE … #define RXCR1_RXME … #define RXCR1_RXUE … #define RXCR1_RXAE … #define RXCR1_RXINVF … #define RXCR1_RXE … #define KS_RXCR2 … #define RXCR2_SRDBL_MASK … #define RXCR2_SRDBL_SHIFT … #define RXCR2_SRDBL_4B … #define RXCR2_SRDBL_8B … #define RXCR2_SRDBL_16B … #define RXCR2_SRDBL_32B … #define RXCR2_SRDBL_FRAME … #define RXCR2_IUFFP … #define RXCR2_RXIUFCEZ … #define RXCR2_UDPLFE … #define RXCR2_RXICMPFCC … #define RXCR2_RXSAF … #define KS_TXMIR … #define KS_RXFHSR … #define RXFSHR_RXFV … #define RXFSHR_RXICMPFCS … #define RXFSHR_RXIPFCS … #define RXFSHR_RXTCPFCS … #define RXFSHR_RXUDPFCS … #define RXFSHR_RXBF … #define RXFSHR_RXMF … #define RXFSHR_RXUF … #define RXFSHR_RXMR … #define RXFSHR_RXFT … #define RXFSHR_RXFTL … #define RXFSHR_RXRF … #define RXFSHR_RXCE … #define KS_RXFHBCR … #define RXFHBCR_CNT_MASK … #define KS_TXQCR … #define TXQCR_AETFE … #define TXQCR_TXQMAM … #define TXQCR_METFE … #define KS_RXQCR … #define RXQCR_RXDTTS … #define RXQCR_RXDBCTS … #define RXQCR_RXFCTS … #define RXQCR_RXIPHTOE … #define RXQCR_RXDTTE … #define RXQCR_RXDBCTE … #define RXQCR_RXFCTE … #define RXQCR_ADRFE … #define RXQCR_SDA … #define RXQCR_RRXEF … #define KS_TXFDPR … #define TXFDPR_TXFPAI … #define TXFDPR_TXFP_MASK … #define TXFDPR_TXFP_SHIFT … #define KS_RXFDPR … #define RXFDPR_RXFPAI … #define RXFDPR_WST … #define RXFDPR_EMS … #define RXFDPR_RXFP_MASK … #define RXFDPR_RXFP_SHIFT … #define KS_RXDTTR … #define KS_RXDBCTR … #define KS_IER … #define KS_ISR … #define IRQ_LCI … #define IRQ_TXI … #define IRQ_RXI … #define IRQ_RXOI … #define IRQ_TXPSI … #define IRQ_RXPSI … #define IRQ_TXSAI … #define IRQ_RXWFDI … #define IRQ_RXMPDI … #define IRQ_LDI … #define IRQ_EDI … #define IRQ_SPIBEI … #define IRQ_DEDI … #define KS_RXFCTR … #define KS_RXFC … #define RXFCTR_RXFC_MASK … #define RXFCTR_RXFC_SHIFT … #define RXFCTR_RXFC_GET(_v) … #define RXFCTR_RXFCT_MASK … #define RXFCTR_RXFCT_SHIFT … #define KS_TXNTFSR … #define KS_MAHTR0 … #define KS_MAHTR1 … #define KS_MAHTR2 … #define KS_MAHTR3 … #define KS_FCLWR … #define KS_FCHWR … #define KS_FCOWR … #define KS_CIDER … #define CIDER_ID … #define CIDER_REV_MASK … #define CIDER_REV_SHIFT … #define CIDER_REV_GET(_v) … #define KS_CGCR … #define KS_IACR … #define IACR_RDEN … #define IACR_TSEL_MASK … #define IACR_TSEL_SHIFT … #define IACR_TSEL_MIB … #define IACR_ADDR_MASK … #define IACR_ADDR_SHIFT … #define KS_IADLR … #define KS_IAHDR … #define KS_PMECR … #define PMECR_PME_DELAY … #define PMECR_PME_POL … #define PMECR_WOL_WAKEUP … #define PMECR_WOL_MAGICPKT … #define PMECR_WOL_LINKUP … #define PMECR_WOL_ENERGY … #define PMECR_AUTO_WAKE_EN … #define PMECR_WAKEUP_NORMAL … #define PMECR_WKEVT_MASK … #define PMECR_WKEVT_SHIFT … #define PMECR_WKEVT_GET(_v) … #define PMECR_WKEVT_ENERGY … #define PMECR_WKEVT_LINK … #define PMECR_WKEVT_MAGICPKT … #define PMECR_WKEVT_FRAME … #define PMECR_PM_MASK … #define PMECR_PM_SHIFT … #define PMECR_PM_NORMAL … #define PMECR_PM_ENERGY … #define PMECR_PM_SOFTDOWN … #define PMECR_PM_POWERSAVE … /* Standard MII PHY data */ #define KS_P1MBCR … #define KS_P1MBSR … #define KS_PHY1ILR … #define KS_PHY1IHR … #define KS_P1ANAR … #define KS_P1ANLPR … #define KS_P1SCLMD … #define KS_P1CR … #define P1CR_LEDOFF … #define P1CR_TXIDS … #define P1CR_RESTARTAN … #define P1CR_DISAUTOMDIX … #define P1CR_FORCEMDIX … #define P1CR_AUTONEGEN … #define P1CR_FORCE100 … #define P1CR_FORCEFDX … #define P1CR_ADV_FLOW … #define P1CR_ADV_100BT_FDX … #define P1CR_ADV_100BT_HDX … #define P1CR_ADV_10BT_FDX … #define P1CR_ADV_10BT_HDX … #define KS_P1SR … #define P1SR_HP_MDIX … #define P1SR_REV_POL … #define P1SR_OP_100M … #define P1SR_OP_FDX … #define P1SR_OP_MDI … #define P1SR_AN_DONE … #define P1SR_LINK_GOOD … #define P1SR_PNTR_FLOW … #define P1SR_PNTR_100BT_FDX … #define P1SR_PNTR_100BT_HDX … #define P1SR_PNTR_10BT_FDX … #define P1SR_PNTR_10BT_HDX … /* TX Frame control */ #define TXFR_TXIC … #define TXFR_TXFID_MASK … #define TXFR_TXFID_SHIFT … /** * struct ks8851_rxctrl - KS8851 driver rx control * @mchash: Multicast hash-table data. * @rxcr1: KS_RXCR1 register setting * @rxcr2: KS_RXCR2 register setting * * Representation of the settings needs to control the receive filtering * such as the multicast hash-filter and the receive register settings. This * is used to make the job of working out if the receive settings change and * then issuing the new settings to the worker that will send the necessary * commands. */ struct ks8851_rxctrl { … }; /** * union ks8851_tx_hdr - tx header data * @txb: The header as bytes * @txw: The header as 16bit, little-endian words * * A dual representation of the tx header data to allow * access to individual bytes, and to allow 16bit accesses * with 16bit alignment. */ ks8851_tx_hdr; /** * struct ks8851_net - KS8851 driver private data * @netdev: The network device we're bound to * @statelock: Lock on this structure for tx list. * @mii: The MII state information for the mii calls. * @rxctrl: RX settings for @rxctrl_work. * @rxctrl_work: Work queue for updating RX mode and multicast lists * @txq: Queue of packets for transmission. * @txh: Space for generating packet TX header in DMA-able data * @rxd: Space for receiving SPI data, in DMA-able space. * @txd: Space for transmitting SPI data, in DMA-able space. * @msg_enable: The message flags controlling driver output (see ethtool). * @tx_space: Free space in the hardware TX buffer (cached copy of KS_TXMIR). * @queued_len: Space required in hardware TX buffer for queued packets in txq. * @fid: Incrementing frame id tag. * @rc_ier: Cached copy of KS_IER. * @rc_ccr: Cached copy of KS_CCR. * @rc_rxqcr: Cached copy of KS_RXQCR. * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM. * @vdd_reg: Optional regulator supplying the chip * @vdd_io: Optional digital power supply for IO * @gpio: Optional reset_n gpio * @mii_bus: Pointer to MII bus structure * @lock: Bus access lock callback * @unlock: Bus access unlock callback * @rdreg16: 16bit register read callback * @wrreg16: 16bit register write callback * @rdfifo: FIFO read callback * @wrfifo: FIFO write callback * @start_xmit: start_xmit() implementation callback * @flush_tx_work: flush_tx_work() implementation callback * * The @statelock is used to protect information in the structure which may * need to be accessed via several sources, such as the network driver layer * or one of the work queues. * * We align the buffers we may use for rx/tx to ensure that if the SPI driver * wants to DMA map them, it will not have any problems with data the driver * modifies. */ struct ks8851_net { … }; int ks8851_probe_common(struct net_device *netdev, struct device *dev, int msg_en); void ks8851_remove_common(struct device *dev); int ks8851_suspend(struct device *dev); int ks8851_resume(struct device *dev); static __maybe_unused SIMPLE_DEV_PM_OPS(ks8851_pm_ops, ks8851_suspend, ks8851_resume); /** * ks8851_done_tx - update and then free skbuff after transmitting * @ks: The device state * @txb: The buffer transmitted */ static void __maybe_unused ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb) { … } #endif /* __KS8851_H__ */
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