#include "coex.h"
#include "fw.h"
#include "mac.h"
#include "phy.h"
#include "reg.h"
#include "rtw8852a.h"
#include "rtw8852a_rfk.h"
#include "rtw8852a_table.h"
#include "txrx.h"
#define RTW8852A_FW_FORMAT_MAX …
#define RTW8852A_FW_BASENAME …
#define RTW8852A_MODULE_FIRMWARE …
static const struct rtw89_hfc_ch_cfg rtw8852a_hfc_chcfg_pcie[] = …;
static const struct rtw89_hfc_pub_cfg rtw8852a_hfc_pubcfg_pcie = …;
static const struct rtw89_hfc_param_ini rtw8852a_hfc_param_ini_pcie[] = …;
static const struct rtw89_dle_mem rtw8852a_dle_mem_pcie[] = …;
static const struct rtw89_reg2_def rtw8852a_pmac_ht20_mcs7_tbl[] = …;
static const struct rtw89_reg3_def rtw8852a_btc_preagc_en_defs[] = …;
static DECLARE_PHY_REG3_TBL(rtw8852a_btc_preagc_en_defs);
static const struct rtw89_reg3_def rtw8852a_btc_preagc_dis_defs[] = …;
static DECLARE_PHY_REG3_TBL(rtw8852a_btc_preagc_dis_defs);
static const struct rtw89_pwr_cfg rtw8852a_pwron[] = …;
static const struct rtw89_pwr_cfg rtw8852a_pwroff[] = …;
static const struct rtw89_pwr_cfg * const pwr_on_seq_8852a[] = …;
static const struct rtw89_pwr_cfg * const pwr_off_seq_8852a[] = …;
static const u32 rtw8852a_h2c_regs[RTW89_H2CREG_MAX] = …;
static const u32 rtw8852a_c2h_regs[RTW89_C2HREG_MAX] = …;
static const u32 rtw8852a_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = …;
static const struct rtw89_page_regs rtw8852a_page_regs = …;
static const struct rtw89_reg_def rtw8852a_dcfo_comp = …;
static const struct rtw89_imr_info rtw8852a_imr_info = …;
static const struct rtw89_xtal_info rtw8852a_xtal_info = …;
static const struct rtw89_rrsr_cfgs rtw8852a_rrsr_cfgs = …;
static const struct rtw89_rfkill_regs rtw8852a_rfkill_regs = …;
static const struct rtw89_dig_regs rtw8852a_dig_regs = …;
static const struct rtw89_edcca_regs rtw8852a_edcca_regs = …;
static void rtw8852ae_efuse_parsing(struct rtw89_efuse *efuse,
struct rtw8852a_efuse *map)
{ … }
static void rtw8852a_efuse_parsing_tssi(struct rtw89_dev *rtwdev,
struct rtw8852a_efuse *map)
{ … }
static int rtw8852a_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map,
enum rtw89_efuse_block block)
{ … }
static void rtw8852a_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map)
{ … }
static void rtw8852a_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev,
u8 *phycap_map)
{ … }
static void rtw8852a_thermal_trim(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev,
u8 *phycap_map)
{ … }
static void rtw8852a_pa_bias_trim(struct rtw89_dev *rtwdev)
{ … }
static int rtw8852a_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map)
{ … }
static void rtw8852a_power_trim(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_set_channel_mac(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
u8 mac_idx)
{ … }
static const u32 rtw8852a_sco_barker_threshold[14] = …;
static const u32 rtw8852a_sco_cck_threshold[14] = …;
static int rtw8852a_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 central_ch,
u8 primary_ch, enum rtw89_bandwidth bw)
{ … }
static void rtw8852a_ch_setting(struct rtw89_dev *rtwdev, u8 central_ch,
u8 path)
{ … }
static u8 rtw8852a_sco_mapping(u8 central_ch)
{ … }
static void rtw8852a_ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path)
{ … }
static void
rtw8852a_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch)
{ … }
static void rtw8852a_bb_reset_all(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_bb_reset_en(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx, bool en)
{ … }
static void rtw8852a_bb_reset(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_bb_macid_ctrl_init(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_bb_sethw(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_bbrst_for_rfk(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_set_channel_bb(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_set_channel(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_mac_idx mac_idx,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_dfs_en(struct rtw89_dev *rtwdev, bool en)
{ … }
static void rtw8852a_tssi_cont_en(struct rtw89_dev *rtwdev, bool en,
enum rtw89_rf_path path)
{ … }
static void rtw8852a_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en,
u8 phy_idx)
{ … }
static void rtw8852a_adc_en(struct rtw89_dev *rtwdev, bool en)
{ … }
static void rtw8852a_set_channel_help(struct rtw89_dev *rtwdev, bool enter,
struct rtw89_channel_help_params *p,
const struct rtw89_chan *chan,
enum rtw89_mac_idx mac_idx,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_fem_setup(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_rfk_init(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_rfk_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
{ … }
static void rtw8852a_rfk_band_changed(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx,
const struct rtw89_chan *chan)
{ … }
static void rtw8852a_rfk_scan(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
bool start)
{ … }
static void rtw8852a_rfk_track(struct rtw89_dev *rtwdev)
{ … }
static u32 rtw8852a_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx, s16 ref)
{ … }
static
void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
s8 pw_ofst, enum rtw89_mac_idx mac_idx)
{ … }
static void rtw8852a_set_txpwr_ref(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_set_txpwr(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_set_txpwr_ctrl(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{ … }
static int
rtw8852a_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
{ … }
void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev)
{ … }
static void rtw8852a_stop_pmac_tx(struct rtw89_dev *rtwdev,
struct rtw8852a_bb_pmac_info *tx_info,
enum rtw89_phy_idx idx)
{ … }
static void rtw8852a_start_pmac_tx(struct rtw89_dev *rtwdev,
struct rtw8852a_bb_pmac_info *tx_info,
enum rtw89_phy_idx idx)
{ … }
void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev,
struct rtw8852a_bb_pmac_info *tx_info,
enum rtw89_phy_idx idx, const struct rtw89_chan *chan)
{ … }
void rtw8852a_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable,
u16 tx_cnt, u16 period, u16 tx_time,
enum rtw89_phy_idx idx, const struct rtw89_chan *chan)
{ … }
void rtw8852a_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm,
enum rtw89_phy_idx idx)
{ … }
void rtw8852a_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path)
{ … }
void rtw8852a_bb_tx_mode_switch(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx idx, u8 mode)
{ … }
static void rtw8852a_ctrl_nbtg_bt_tx(struct rtw89_dev *rtwdev, bool en,
enum rtw89_phy_idx phy_idx)
{ … }
static u8 rtw8852a_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path)
{ … }
static void rtw8852a_btc_set_rfe(struct rtw89_dev *rtwdev)
{ … }
static
void rtw8852a_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val)
{ … }
static void rtw8852a_ctrl_btg_bt_rx(struct rtw89_dev *rtwdev, bool en,
enum rtw89_phy_idx phy_idx)
{ … }
static void rtw8852a_btc_init_cfg(struct rtw89_dev *rtwdev)
{ … }
static
void rtw8852a_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state)
{ … }
static inline u32 __btc_ctrl_val_all_time(u32 ctrl)
{ … }
static inline u32 __btc_ctrl_rst_all_time(u32 cur)
{ … }
static inline u32 __btc_ctrl_gen_all_time(u32 cur, u32 val)
{ … }
static inline u32 __btc_ctrl_val_gnt_bt(u32 ctrl)
{ … }
static inline u32 __btc_ctrl_rst_gnt_bt(u32 cur)
{ … }
static inline u32 __btc_ctrl_gen_gnt_bt(u32 cur, u32 val)
{ … }
static void
rtw8852a_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val)
{ … }
static
s8 rtw8852a_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val)
{ … }
static struct rtw89_btc_rf_trx_para rtw89_btc_8852a_rf_ul[] = …;
static struct rtw89_btc_rf_trx_para rtw89_btc_8852a_rf_dl[] = …;
static const
u8 rtw89_btc_8852a_wl_rssi_thres[BTC_WL_RSSI_THMAX] = …;
static const
u8 rtw89_btc_8852a_bt_rssi_thres[BTC_BT_RSSI_THMAX] = …;
static struct rtw89_btc_fbtc_mreg rtw89_btc_8852a_mon_reg[] = …;
static
void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev)
{ … }
static
void rtw8852a_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state)
{ … }
static void rtw8852a_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level)
{ … }
static void rtw8852a_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level)
{ … }
static void rtw8852a_fill_freq_with_ppdu(struct rtw89_dev *rtwdev,
struct rtw89_rx_phy_ppdu *phy_ppdu,
struct ieee80211_rx_status *status)
{ … }
static void rtw8852a_query_ppdu(struct rtw89_dev *rtwdev,
struct rtw89_rx_phy_ppdu *phy_ppdu,
struct ieee80211_rx_status *status)
{ … }
#ifdef CONFIG_PM
static const struct wiphy_wowlan_support rtw_wowlan_stub_8852a = …;
#endif
static const struct rtw89_chip_ops rtw8852a_chip_ops = …;
const struct rtw89_chip_info rtw8852a_chip_info = …;
EXPORT_SYMBOL(…);
MODULE_FIRMWARE(…);
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;