#ifndef __T7XX_DPMAIF_H__
#define __T7XX_DPMAIF_H__
#include <linux/bits.h>
#include <linux/types.h>
#define DPMAIF_DL_PIT_SEQ_VALUE …
#define DPMAIF_UL_DRB_SIZE_WORD …
#define DPMAIF_MAX_CHECK_COUNT …
#define DPMAIF_CHECK_TIMEOUT_US …
#define DPMAIF_CHECK_INIT_TIMEOUT_US …
#define DPMAIF_CHECK_DELAY_US …
#define DPMAIF_RXQ_NUM …
#define DPMAIF_TXQ_NUM …
struct dpmaif_isr_en_mask { … };
struct dpmaif_ul { … };
struct dpmaif_dl { … };
struct dpmaif_hw_info { … };
struct dpmaif_hw_params { … };
enum dpmaif_hw_intr_type { … };
#define DPF_RX_QNO0 …
#define DPF_RX_QNO1 …
#define DPF_RX_QNO_DFT …
struct dpmaif_hw_intr_st_para { … };
#define DPMAIF_HW_BAT_REMAIN …
#define DPMAIF_HW_BAT_PKTBUF …
#define DPMAIF_HW_FRG_PKTBUF …
#define DPMAIF_HW_BAT_RSVLEN …
#define DPMAIF_HW_PKT_BIDCNT …
#define DPMAIF_HW_MTU_SIZE …
#define DPMAIF_HW_CHK_BAT_NUM …
#define DPMAIF_HW_CHK_FRG_NUM …
#define DPMAIF_HW_CHK_PIT_NUM …
#define DP_UL_INT_DONE_OFFSET …
#define DP_UL_INT_QDONE_MSK …
#define DP_UL_INT_EMPTY_MSK …
#define DP_UL_INT_MD_NOTREADY_MSK …
#define DP_UL_INT_MD_PWR_NOTREADY_MSK …
#define DP_UL_INT_ERR_MSK …
#define DP_DL_INT_QDONE_MSK …
#define DP_DL_INT_SKB_LEN_ERR …
#define DP_DL_INT_BATCNT_LEN_ERR …
#define DP_DL_INT_PITCNT_LEN_ERR …
#define DP_DL_INT_PKT_EMPTY_MSK …
#define DP_DL_INT_FRG_EMPTY_MSK …
#define DP_DL_INT_MTU_ERR_MSK …
#define DP_DL_INT_FRG_LEN_ERR_MSK …
#define DP_DL_INT_Q0_PITCNT_LEN_ERR …
#define DP_DL_INT_Q1_PITCNT_LEN_ERR …
#define DP_DL_INT_HPC_ENT_TYPE_ERR …
#define DP_DL_INT_Q0_DONE …
#define DP_DL_INT_Q1_DONE …
#define DP_DL_Q0_STATUS_MASK …
#define DP_DL_Q1_STATUS_MASK …
int t7xx_dpmaif_hw_init(struct dpmaif_hw_info *hw_info, struct dpmaif_hw_params *init_param);
int t7xx_dpmaif_hw_stop_all_txq(struct dpmaif_hw_info *hw_info);
int t7xx_dpmaif_hw_stop_all_rxq(struct dpmaif_hw_info *hw_info);
void t7xx_dpmaif_start_hw(struct dpmaif_hw_info *hw_info);
int t7xx_dpmaif_hw_get_intr_cnt(struct dpmaif_hw_info *hw_info,
struct dpmaif_hw_intr_st_para *para, int qno);
void t7xx_dpmaif_unmask_ulq_intr(struct dpmaif_hw_info *hw_info, unsigned int q_num);
void t7xx_dpmaif_ul_update_hw_drb_cnt(struct dpmaif_hw_info *hw_info, unsigned int q_num,
unsigned int drb_entry_cnt);
int t7xx_dpmaif_dl_snd_hw_bat_cnt(struct dpmaif_hw_info *hw_info, unsigned int bat_entry_cnt);
int t7xx_dpmaif_dl_snd_hw_frg_cnt(struct dpmaif_hw_info *hw_info, unsigned int frg_entry_cnt);
int t7xx_dpmaif_dlq_add_pit_remain_cnt(struct dpmaif_hw_info *hw_info, unsigned int dlq_pit_idx,
unsigned int pit_remain_cnt);
void t7xx_dpmaif_dlq_unmask_pitcnt_len_err_intr(struct dpmaif_hw_info *hw_info,
unsigned int qno);
void t7xx_dpmaif_dlq_unmask_rx_done(struct dpmaif_hw_info *hw_info, unsigned int qno);
bool t7xx_dpmaif_ul_clr_done(struct dpmaif_hw_info *hw_info, unsigned int qno);
void t7xx_dpmaif_ul_clr_all_intr(struct dpmaif_hw_info *hw_info);
void t7xx_dpmaif_dl_clr_all_intr(struct dpmaif_hw_info *hw_info);
void t7xx_dpmaif_clr_ip_busy_sts(struct dpmaif_hw_info *hw_info);
void t7xx_dpmaif_dl_unmask_batcnt_len_err_intr(struct dpmaif_hw_info *hw_info);
void t7xx_dpmaif_dl_unmask_pitcnt_len_err_intr(struct dpmaif_hw_info *hw_info);
unsigned int t7xx_dpmaif_ul_get_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num);
unsigned int t7xx_dpmaif_dl_get_bat_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num);
unsigned int t7xx_dpmaif_dl_get_bat_wr_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num);
unsigned int t7xx_dpmaif_dl_get_frg_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num);
unsigned int t7xx_dpmaif_dl_dlq_pit_get_wr_idx(struct dpmaif_hw_info *hw_info,
unsigned int dlq_pit_idx);
#endif