/* SPDX-License-Identifier: GPL-2.0 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #ifndef _css_receiver_2400_defs_h_ #define _css_receiver_2400_defs_h_ #include "css_receiver_2400_common_defs.h" #define CSS_RECEIVER_DATA_WIDTH … #define CSS_RECEIVER_RX_TRIG … #define CSS_RECEIVER_RF_WORD … #define CSS_RECEIVER_IMG_PROC_RF_ADDR … #define CSS_RECEIVER_CSI_RF_ADDR … #define CSS_RECEIVER_DATA_OUT … #define CSS_RECEIVER_CHN_NO … #define CSS_RECEIVER_DWORD_CNT … #define CSS_RECEIVER_FORMAT_TYP … #define CSS_RECEIVER_HRESPONSE … #define CSS_RECEIVER_STATE_WIDTH … #define CSS_RECEIVER_FIFO_DAT … #define CSS_RECEIVER_CNT_VAL … #define CSS_RECEIVER_PRED10_VAL … #define CSS_RECEIVER_PRED12_VAL … #define CSS_RECEIVER_CNT_WIDTH … #define CSS_RECEIVER_WORD_CNT … #define CSS_RECEIVER_PIXEL_LEN … #define CSS_RECEIVER_PIXEL_CNT … #define CSS_RECEIVER_COMP_8_BIT … #define CSS_RECEIVER_COMP_7_BIT … #define CSS_RECEIVER_COMP_6_BIT … #define CSI_CONFIG_WIDTH … /* division of gen_short data, ch_id and fmt_type over streaming data interface */ #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB … #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB … #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB … #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB … #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB … #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB … #define _HRT_CSS_RECEIVER_2400_REG_ALIGN … #define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT … #define hrt_css_receiver_2400_4_lane_port_offset … #define hrt_css_receiver_2400_1_lane_port_offset … #define hrt_css_receiver_2400_2_lane_port_offset … #define hrt_css_receiver_2400_backend_port_offset … #define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX … #define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX … #define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX … #define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX … #define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX … #define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX … #define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX … #define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX … #define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX … /* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ #define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT … #define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ … #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ … /* Bits for CSI2_DEVICE_READY register */ #define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX … /* Bits for CSI2_FUNC_PROG register */ #define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX … #define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS … /* Bits for INIT_COUNT register */ #define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX … #define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS … /* Bits for COUNT registers */ #define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX … #define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS … #define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX … #define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS … /* Bits for RAW116_18_DATAID register */ #define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS … #define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS … /* Bits for COMP_FORMAT register, this selects the compression data format */ #define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS … #define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS … /* Bits for COMP_PREDICT register, this selects the predictor algorithm */ #define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP … #define _HRT_CSS_RECEIVER_2400_PREDICT_1 … #define _HRT_CSS_RECEIVER_2400_PREDICT_2 … /* Number of bits used for the delay registers */ #define _HRT_CSS_RECEIVER_2400_DELAY_BITS … /* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX … #define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS … /* BITS for backend RAW16 and RAW 18 registers */ #define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX … #define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS … #define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX … #define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS … #define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX … #define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS … #define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS … #define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS … #define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX … #define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS … /* These hsync and vsync values are for HSS simulation only */ #define _HRT_CSS_RECEIVER_2400_HSYNC_VAL … #define _HRT_CSS_RECEIVER_2400_VSYNC_VAL … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT … #define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT … // SH Backend Register IDs #define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX … #define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX … #define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX … #define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX … #define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX … #define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS … #define _HRT_CSS_RECEIVER_2400_BE_SRST_HE … #define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF … #define _HRT_CSS_RECEIVER_2400_BE_SRST_PF … #define _HRT_CSS_RECEIVER_2400_BE_SRST_SM … #define _HRT_CSS_RECEIVER_2400_BE_SRST_PD … #define _HRT_CSS_RECEIVER_2400_BE_SRST_SD … #define _HRT_CSS_RECEIVER_2400_BE_SRST_OT … #define _HRT_CSS_RECEIVER_2400_BE_SRST_BC … #define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH … #endif /* _css_receiver_2400_defs_h_ */
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