// SPDX-License-Identifier: GPL-2.0 // LPC interface for ChromeOS Embedded Controller // // Copyright (C) 2012-2015 Google, Inc // // This driver uses the ChromeOS EC byte-level message-based protocol for // communicating the keyboard state (which keys are pressed) from a keyboard EC // to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing, // but everything else (including deghosting) is done here. The main // motivation for this is to keep the EC firmware as simple as possible, since // it cannot be easily upgraded and EC flash/IRAM space is relatively // expensive. #include <linux/acpi.h> #include <linux/dmi.h> #include <linux/delay.h> #include <linux/io.h> #include <linux/interrupt.h> #include <linux/kobject.h> #include <linux/module.h> #include <linux/platform_data/cros_ec_commands.h> #include <linux/platform_data/cros_ec_proto.h> #include <linux/platform_device.h> #include <linux/printk.h> #include <linux/reboot.h> #include <linux/suspend.h> #include "cros_ec.h" #include "cros_ec_lpc_mec.h" #define DRV_NAME … #define ACPI_DRV_NAME … /* True if ACPI device is present */ static bool cros_ec_lpc_acpi_device_found; /* * Indicates that lpc_driver_data.quirk_mmio_memory_base should * be used as the base port for EC mapped memory. */ #define CROS_EC_LPC_QUIRK_REMAP_MEMORY … /* * Indicates that lpc_driver_data.quirk_acpi_id should be used to find * the ACPI device. */ #define CROS_EC_LPC_QUIRK_ACPI_ID … /* * Indicates that lpc_driver_data.quirk_aml_mutex_name should be used * to find an AML mutex to protect access to Microchip EC. */ #define CROS_EC_LPC_QUIRK_AML_MUTEX … /** * struct lpc_driver_data - driver data attached to a DMI device ID to indicate * hardware quirks. * @quirks: a bitfield composed of quirks from CROS_EC_LPC_QUIRK_* * @quirk_mmio_memory_base: The first I/O port addressing EC mapped memory (used * when quirk ...REMAP_MEMORY is set.) * @quirk_acpi_id: An ACPI HID to be used to find the ACPI device. * @quirk_aml_mutex_name: The name of an AML mutex to be used to protect access * to Microchip EC. */ struct lpc_driver_data { … }; /** * struct cros_ec_lpc - LPC device-specific data * @mmio_memory_base: The first I/O port addressing EC mapped memory. */ struct cros_ec_lpc { … }; /** * struct lpc_driver_ops - LPC driver operations * @read: Copy length bytes from EC address offset into buffer dest. * Returns a negative error code on error, or the 8-bit checksum * of all bytes read. * @write: Copy length bytes from buffer msg into EC address offset. * Returns a negative error code on error, or the 8-bit checksum * of all bytes written. */ struct lpc_driver_ops { … }; static struct lpc_driver_ops cros_ec_lpc_ops = …; /* * A generic instance of the read function of struct lpc_driver_ops, used for * the LPC EC. */ static int cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest) { … } /* * A generic instance of the write function of struct lpc_driver_ops, used for * the LPC EC. */ static int cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, const u8 *msg) { … } /* * An instance of the read function of struct lpc_driver_ops, used for the * MEC variant of LPC EC. */ static int cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length, u8 *dest) { … } /* * An instance of the write function of struct lpc_driver_ops, used for the * MEC variant of LPC EC. */ static int cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length, const u8 *msg) { … } static int ec_response_timed_out(void) { … } static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec, struct cros_ec_command *msg) { … } static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec, struct cros_ec_command *msg) { … } /* Returns num bytes read, or negative on error. Doesn't need locking. */ static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset, unsigned int bytes, void *dest) { … } static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data) { … } static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level, void *context, void **retval) { … } static struct acpi_device *cros_ec_lpc_get_device(const char *id) { … } static int cros_ec_lpc_probe(struct platform_device *pdev) { … } static void cros_ec_lpc_remove(struct platform_device *pdev) { … } static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = …; MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids); static const struct lpc_driver_data framework_laptop_npcx_lpc_driver_data __initconst = …; static const struct lpc_driver_data framework_laptop_mec_lpc_driver_data __initconst = …; static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = …; MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table); #ifdef CONFIG_PM_SLEEP static int cros_ec_lpc_prepare(struct device *dev) { … } static void cros_ec_lpc_complete(struct device *dev) { … } static int cros_ec_lpc_suspend_late(struct device *dev) { … } static int cros_ec_lpc_resume_early(struct device *dev) { … } #endif static const struct dev_pm_ops cros_ec_lpc_pm_ops = …; static struct platform_driver cros_ec_lpc_driver = …; static struct platform_device cros_ec_lpc_device = …; static int __init cros_ec_lpc_init(void) { … } static void __exit cros_ec_lpc_exit(void) { … } module_init(…) …; module_exit(cros_ec_lpc_exit); MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …;
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