linux/include/linux/mfd/wm8400-private.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * wm8400 private definitions.
 *
 * Copyright 2008 Wolfson Microelectronics plc
 */

#ifndef __LINUX_MFD_WM8400_PRIV_H
#define __LINUX_MFD_WM8400_PRIV_H

#include <linux/mfd/wm8400.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#define WM8400_REGISTER_COUNT

struct wm8400 {};

/*
 * Register values.
 */
#define WM8400_RESET_ID
#define WM8400_ID
#define WM8400_POWER_MANAGEMENT_1
#define WM8400_POWER_MANAGEMENT_2
#define WM8400_POWER_MANAGEMENT_3
#define WM8400_AUDIO_INTERFACE_1
#define WM8400_AUDIO_INTERFACE_2
#define WM8400_CLOCKING_1
#define WM8400_CLOCKING_2
#define WM8400_AUDIO_INTERFACE_3
#define WM8400_AUDIO_INTERFACE_4
#define WM8400_DAC_CTRL
#define WM8400_LEFT_DAC_DIGITAL_VOLUME
#define WM8400_RIGHT_DAC_DIGITAL_VOLUME
#define WM8400_DIGITAL_SIDE_TONE
#define WM8400_ADC_CTRL
#define WM8400_LEFT_ADC_DIGITAL_VOLUME
#define WM8400_RIGHT_ADC_DIGITAL_VOLUME
#define WM8400_GPIO_CTRL_1
#define WM8400_GPIO1_GPIO2
#define WM8400_GPIO3_GPIO4
#define WM8400_GPIO5_GPIO6
#define WM8400_GPIOCTRL_2
#define WM8400_GPIO_POL
#define WM8400_LEFT_LINE_INPUT_1_2_VOLUME
#define WM8400_LEFT_LINE_INPUT_3_4_VOLUME
#define WM8400_RIGHT_LINE_INPUT_1_2_VOLUME
#define WM8400_RIGHT_LINE_INPUT_3_4_VOLUME
#define WM8400_LEFT_OUTPUT_VOLUME
#define WM8400_RIGHT_OUTPUT_VOLUME
#define WM8400_LINE_OUTPUTS_VOLUME
#define WM8400_OUT3_4_VOLUME
#define WM8400_LEFT_OPGA_VOLUME
#define WM8400_RIGHT_OPGA_VOLUME
#define WM8400_SPEAKER_VOLUME
#define WM8400_CLASSD1
#define WM8400_CLASSD3
#define WM8400_INPUT_MIXER1
#define WM8400_INPUT_MIXER2
#define WM8400_INPUT_MIXER3
#define WM8400_INPUT_MIXER4
#define WM8400_INPUT_MIXER5
#define WM8400_INPUT_MIXER6
#define WM8400_OUTPUT_MIXER1
#define WM8400_OUTPUT_MIXER2
#define WM8400_OUTPUT_MIXER3
#define WM8400_OUTPUT_MIXER4
#define WM8400_OUTPUT_MIXER5
#define WM8400_OUTPUT_MIXER6
#define WM8400_OUT3_4_MIXER
#define WM8400_LINE_MIXER1
#define WM8400_LINE_MIXER2
#define WM8400_SPEAKER_MIXER
#define WM8400_ADDITIONAL_CONTROL
#define WM8400_ANTIPOP1
#define WM8400_ANTIPOP2
#define WM8400_MICBIAS
#define WM8400_FLL_CONTROL_1
#define WM8400_FLL_CONTROL_2
#define WM8400_FLL_CONTROL_3
#define WM8400_FLL_CONTROL_4
#define WM8400_LDO1_CONTROL
#define WM8400_LDO2_CONTROL
#define WM8400_LDO3_CONTROL
#define WM8400_LDO4_CONTROL
#define WM8400_DCDC1_CONTROL_1
#define WM8400_DCDC1_CONTROL_2
#define WM8400_DCDC2_CONTROL_1
#define WM8400_DCDC2_CONTROL_2
#define WM8400_INTERFACE
#define WM8400_PM_GENERAL
#define WM8400_PM_SHUTDOWN_CONTROL
#define WM8400_INTERRUPT_STATUS_1
#define WM8400_INTERRUPT_STATUS_1_MASK
#define WM8400_INTERRUPT_LEVELS
#define WM8400_SHUTDOWN_REASON
#define WM8400_LINE_CIRCUITS

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Reset/ID
 */
#define WM8400_SW_RESET_CHIP_ID_MASK
#define WM8400_SW_RESET_CHIP_ID_SHIFT
#define WM8400_SW_RESET_CHIP_ID_WIDTH

/*
 * R1 (0x01) - ID
 */
#define WM8400_CHIP_REV_MASK
#define WM8400_CHIP_REV_SHIFT
#define WM8400_CHIP_REV_WIDTH

/*
 * R18 (0x12) - GPIO CTRL 1
 */
#define WM8400_IRQ
#define WM8400_IRQ_MASK
#define WM8400_IRQ_SHIFT
#define WM8400_IRQ_WIDTH
#define WM8400_TEMPOK
#define WM8400_TEMPOK_MASK
#define WM8400_TEMPOK_SHIFT
#define WM8400_TEMPOK_WIDTH
#define WM8400_MIC1SHRT
#define WM8400_MIC1SHRT_MASK
#define WM8400_MIC1SHRT_SHIFT
#define WM8400_MIC1SHRT_WIDTH
#define WM8400_MIC1DET
#define WM8400_MIC1DET_MASK
#define WM8400_MIC1DET_SHIFT
#define WM8400_MIC1DET_WIDTH
#define WM8400_FLL_LCK
#define WM8400_FLL_LCK_MASK
#define WM8400_FLL_LCK_SHIFT
#define WM8400_FLL_LCK_WIDTH
#define WM8400_GPIO_STATUS_MASK
#define WM8400_GPIO_STATUS_SHIFT
#define WM8400_GPIO_STATUS_WIDTH

/*
 * R19 (0x13) - GPIO1 & GPIO2
 */
#define WM8400_GPIO2_DEB_ENA
#define WM8400_GPIO2_DEB_ENA_MASK
#define WM8400_GPIO2_DEB_ENA_SHIFT
#define WM8400_GPIO2_DEB_ENA_WIDTH
#define WM8400_GPIO2_IRQ_ENA
#define WM8400_GPIO2_IRQ_ENA_MASK
#define WM8400_GPIO2_IRQ_ENA_SHIFT
#define WM8400_GPIO2_IRQ_ENA_WIDTH
#define WM8400_GPIO2_PU
#define WM8400_GPIO2_PU_MASK
#define WM8400_GPIO2_PU_SHIFT
#define WM8400_GPIO2_PU_WIDTH
#define WM8400_GPIO2_PD
#define WM8400_GPIO2_PD_MASK
#define WM8400_GPIO2_PD_SHIFT
#define WM8400_GPIO2_PD_WIDTH
#define WM8400_GPIO2_SEL_MASK
#define WM8400_GPIO2_SEL_SHIFT
#define WM8400_GPIO2_SEL_WIDTH
#define WM8400_GPIO1_DEB_ENA
#define WM8400_GPIO1_DEB_ENA_MASK
#define WM8400_GPIO1_DEB_ENA_SHIFT
#define WM8400_GPIO1_DEB_ENA_WIDTH
#define WM8400_GPIO1_IRQ_ENA
#define WM8400_GPIO1_IRQ_ENA_MASK
#define WM8400_GPIO1_IRQ_ENA_SHIFT
#define WM8400_GPIO1_IRQ_ENA_WIDTH
#define WM8400_GPIO1_PU
#define WM8400_GPIO1_PU_MASK
#define WM8400_GPIO1_PU_SHIFT
#define WM8400_GPIO1_PU_WIDTH
#define WM8400_GPIO1_PD
#define WM8400_GPIO1_PD_MASK
#define WM8400_GPIO1_PD_SHIFT
#define WM8400_GPIO1_PD_WIDTH
#define WM8400_GPIO1_SEL_MASK
#define WM8400_GPIO1_SEL_SHIFT
#define WM8400_GPIO1_SEL_WIDTH

/*
 * R20 (0x14) - GPIO3 & GPIO4
 */
#define WM8400_GPIO4_DEB_ENA
#define WM8400_GPIO4_DEB_ENA_MASK
#define WM8400_GPIO4_DEB_ENA_SHIFT
#define WM8400_GPIO4_DEB_ENA_WIDTH
#define WM8400_GPIO4_IRQ_ENA
#define WM8400_GPIO4_IRQ_ENA_MASK
#define WM8400_GPIO4_IRQ_ENA_SHIFT
#define WM8400_GPIO4_IRQ_ENA_WIDTH
#define WM8400_GPIO4_PU
#define WM8400_GPIO4_PU_MASK
#define WM8400_GPIO4_PU_SHIFT
#define WM8400_GPIO4_PU_WIDTH
#define WM8400_GPIO4_PD
#define WM8400_GPIO4_PD_MASK
#define WM8400_GPIO4_PD_SHIFT
#define WM8400_GPIO4_PD_WIDTH
#define WM8400_GPIO4_SEL_MASK
#define WM8400_GPIO4_SEL_SHIFT
#define WM8400_GPIO4_SEL_WIDTH
#define WM8400_GPIO3_DEB_ENA
#define WM8400_GPIO3_DEB_ENA_MASK
#define WM8400_GPIO3_DEB_ENA_SHIFT
#define WM8400_GPIO3_DEB_ENA_WIDTH
#define WM8400_GPIO3_IRQ_ENA
#define WM8400_GPIO3_IRQ_ENA_MASK
#define WM8400_GPIO3_IRQ_ENA_SHIFT
#define WM8400_GPIO3_IRQ_ENA_WIDTH
#define WM8400_GPIO3_PU
#define WM8400_GPIO3_PU_MASK
#define WM8400_GPIO3_PU_SHIFT
#define WM8400_GPIO3_PU_WIDTH
#define WM8400_GPIO3_PD
#define WM8400_GPIO3_PD_MASK
#define WM8400_GPIO3_PD_SHIFT
#define WM8400_GPIO3_PD_WIDTH
#define WM8400_GPIO3_SEL_MASK
#define WM8400_GPIO3_SEL_SHIFT
#define WM8400_GPIO3_SEL_WIDTH

/*
 * R21 (0x15) - GPIO5 & GPIO6
 */
#define WM8400_GPIO6_DEB_ENA
#define WM8400_GPIO6_DEB_ENA_MASK
#define WM8400_GPIO6_DEB_ENA_SHIFT
#define WM8400_GPIO6_DEB_ENA_WIDTH
#define WM8400_GPIO6_IRQ_ENA
#define WM8400_GPIO6_IRQ_ENA_MASK
#define WM8400_GPIO6_IRQ_ENA_SHIFT
#define WM8400_GPIO6_IRQ_ENA_WIDTH
#define WM8400_GPIO6_PU
#define WM8400_GPIO6_PU_MASK
#define WM8400_GPIO6_PU_SHIFT
#define WM8400_GPIO6_PU_WIDTH
#define WM8400_GPIO6_PD
#define WM8400_GPIO6_PD_MASK
#define WM8400_GPIO6_PD_SHIFT
#define WM8400_GPIO6_PD_WIDTH
#define WM8400_GPIO6_SEL_MASK
#define WM8400_GPIO6_SEL_SHIFT
#define WM8400_GPIO6_SEL_WIDTH
#define WM8400_GPIO5_DEB_ENA
#define WM8400_GPIO5_DEB_ENA_MASK
#define WM8400_GPIO5_DEB_ENA_SHIFT
#define WM8400_GPIO5_DEB_ENA_WIDTH
#define WM8400_GPIO5_IRQ_ENA
#define WM8400_GPIO5_IRQ_ENA_MASK
#define WM8400_GPIO5_IRQ_ENA_SHIFT
#define WM8400_GPIO5_IRQ_ENA_WIDTH
#define WM8400_GPIO5_PU
#define WM8400_GPIO5_PU_MASK
#define WM8400_GPIO5_PU_SHIFT
#define WM8400_GPIO5_PU_WIDTH
#define WM8400_GPIO5_PD
#define WM8400_GPIO5_PD_MASK
#define WM8400_GPIO5_PD_SHIFT
#define WM8400_GPIO5_PD_WIDTH
#define WM8400_GPIO5_SEL_MASK
#define WM8400_GPIO5_SEL_SHIFT
#define WM8400_GPIO5_SEL_WIDTH

/*
 * R22 (0x16) - GPIOCTRL 2
 */
#define WM8400_TEMPOK_IRQ_ENA
#define WM8400_TEMPOK_IRQ_ENA_MASK
#define WM8400_TEMPOK_IRQ_ENA_SHIFT
#define WM8400_TEMPOK_IRQ_ENA_WIDTH
#define WM8400_MIC1SHRT_IRQ_ENA
#define WM8400_MIC1SHRT_IRQ_ENA_MASK
#define WM8400_MIC1SHRT_IRQ_ENA_SHIFT
#define WM8400_MIC1SHRT_IRQ_ENA_WIDTH
#define WM8400_MIC1DET_IRQ_ENA
#define WM8400_MIC1DET_IRQ_ENA_MASK
#define WM8400_MIC1DET_IRQ_ENA_SHIFT
#define WM8400_MIC1DET_IRQ_ENA_WIDTH
#define WM8400_FLL_LCK_IRQ_ENA
#define WM8400_FLL_LCK_IRQ_ENA_MASK
#define WM8400_FLL_LCK_IRQ_ENA_SHIFT
#define WM8400_FLL_LCK_IRQ_ENA_WIDTH
#define WM8400_GPI8_DEB_ENA
#define WM8400_GPI8_DEB_ENA_MASK
#define WM8400_GPI8_DEB_ENA_SHIFT
#define WM8400_GPI8_DEB_ENA_WIDTH
#define WM8400_GPI8_IRQ_ENA
#define WM8400_GPI8_IRQ_ENA_MASK
#define WM8400_GPI8_IRQ_ENA_SHIFT
#define WM8400_GPI8_IRQ_ENA_WIDTH
#define WM8400_GPI8_ENA
#define WM8400_GPI8_ENA_MASK
#define WM8400_GPI8_ENA_SHIFT
#define WM8400_GPI8_ENA_WIDTH
#define WM8400_GPI7_DEB_ENA
#define WM8400_GPI7_DEB_ENA_MASK
#define WM8400_GPI7_DEB_ENA_SHIFT
#define WM8400_GPI7_DEB_ENA_WIDTH
#define WM8400_GPI7_IRQ_ENA
#define WM8400_GPI7_IRQ_ENA_MASK
#define WM8400_GPI7_IRQ_ENA_SHIFT
#define WM8400_GPI7_IRQ_ENA_WIDTH
#define WM8400_GPI7_ENA
#define WM8400_GPI7_ENA_MASK
#define WM8400_GPI7_ENA_SHIFT
#define WM8400_GPI7_ENA_WIDTH

/*
 * R23 (0x17) - GPIO_POL
 */
#define WM8400_IRQ_INV
#define WM8400_IRQ_INV_MASK
#define WM8400_IRQ_INV_SHIFT
#define WM8400_IRQ_INV_WIDTH
#define WM8400_TEMPOK_POL
#define WM8400_TEMPOK_POL_MASK
#define WM8400_TEMPOK_POL_SHIFT
#define WM8400_TEMPOK_POL_WIDTH
#define WM8400_MIC1SHRT_POL
#define WM8400_MIC1SHRT_POL_MASK
#define WM8400_MIC1SHRT_POL_SHIFT
#define WM8400_MIC1SHRT_POL_WIDTH
#define WM8400_MIC1DET_POL
#define WM8400_MIC1DET_POL_MASK
#define WM8400_MIC1DET_POL_SHIFT
#define WM8400_MIC1DET_POL_WIDTH
#define WM8400_FLL_LCK_POL
#define WM8400_FLL_LCK_POL_MASK
#define WM8400_FLL_LCK_POL_SHIFT
#define WM8400_FLL_LCK_POL_WIDTH
#define WM8400_GPIO_POL_MASK
#define WM8400_GPIO_POL_SHIFT
#define WM8400_GPIO_POL_WIDTH

/*
 * R65 (0x41) - LDO 1 Control
 */
#define WM8400_LDO1_ENA
#define WM8400_LDO1_ENA_MASK
#define WM8400_LDO1_ENA_SHIFT
#define WM8400_LDO1_ENA_WIDTH
#define WM8400_LDO1_SWI
#define WM8400_LDO1_SWI_MASK
#define WM8400_LDO1_SWI_SHIFT
#define WM8400_LDO1_SWI_WIDTH
#define WM8400_LDO1_OPFLT
#define WM8400_LDO1_OPFLT_MASK
#define WM8400_LDO1_OPFLT_SHIFT
#define WM8400_LDO1_OPFLT_WIDTH
#define WM8400_LDO1_ERRACT
#define WM8400_LDO1_ERRACT_MASK
#define WM8400_LDO1_ERRACT_SHIFT
#define WM8400_LDO1_ERRACT_WIDTH
#define WM8400_LDO1_HIB_MODE
#define WM8400_LDO1_HIB_MODE_MASK
#define WM8400_LDO1_HIB_MODE_SHIFT
#define WM8400_LDO1_HIB_MODE_WIDTH
#define WM8400_LDO1_VIMG_MASK
#define WM8400_LDO1_VIMG_SHIFT
#define WM8400_LDO1_VIMG_WIDTH
#define WM8400_LDO1_VSEL_MASK
#define WM8400_LDO1_VSEL_SHIFT
#define WM8400_LDO1_VSEL_WIDTH

/*
 * R66 (0x42) - LDO 2 Control
 */
#define WM8400_LDO2_ENA
#define WM8400_LDO2_ENA_MASK
#define WM8400_LDO2_ENA_SHIFT
#define WM8400_LDO2_ENA_WIDTH
#define WM8400_LDO2_SWI
#define WM8400_LDO2_SWI_MASK
#define WM8400_LDO2_SWI_SHIFT
#define WM8400_LDO2_SWI_WIDTH
#define WM8400_LDO2_OPFLT
#define WM8400_LDO2_OPFLT_MASK
#define WM8400_LDO2_OPFLT_SHIFT
#define WM8400_LDO2_OPFLT_WIDTH
#define WM8400_LDO2_ERRACT
#define WM8400_LDO2_ERRACT_MASK
#define WM8400_LDO2_ERRACT_SHIFT
#define WM8400_LDO2_ERRACT_WIDTH
#define WM8400_LDO2_HIB_MODE
#define WM8400_LDO2_HIB_MODE_MASK
#define WM8400_LDO2_HIB_MODE_SHIFT
#define WM8400_LDO2_HIB_MODE_WIDTH
#define WM8400_LDO2_VIMG_MASK
#define WM8400_LDO2_VIMG_SHIFT
#define WM8400_LDO2_VIMG_WIDTH
#define WM8400_LDO2_VSEL_MASK
#define WM8400_LDO2_VSEL_SHIFT
#define WM8400_LDO2_VSEL_WIDTH

/*
 * R67 (0x43) - LDO 3 Control
 */
#define WM8400_LDO3_ENA
#define WM8400_LDO3_ENA_MASK
#define WM8400_LDO3_ENA_SHIFT
#define WM8400_LDO3_ENA_WIDTH
#define WM8400_LDO3_SWI
#define WM8400_LDO3_SWI_MASK
#define WM8400_LDO3_SWI_SHIFT
#define WM8400_LDO3_SWI_WIDTH
#define WM8400_LDO3_OPFLT
#define WM8400_LDO3_OPFLT_MASK
#define WM8400_LDO3_OPFLT_SHIFT
#define WM8400_LDO3_OPFLT_WIDTH
#define WM8400_LDO3_ERRACT
#define WM8400_LDO3_ERRACT_MASK
#define WM8400_LDO3_ERRACT_SHIFT
#define WM8400_LDO3_ERRACT_WIDTH
#define WM8400_LDO3_HIB_MODE
#define WM8400_LDO3_HIB_MODE_MASK
#define WM8400_LDO3_HIB_MODE_SHIFT
#define WM8400_LDO3_HIB_MODE_WIDTH
#define WM8400_LDO3_VIMG_MASK
#define WM8400_LDO3_VIMG_SHIFT
#define WM8400_LDO3_VIMG_WIDTH
#define WM8400_LDO3_VSEL_MASK
#define WM8400_LDO3_VSEL_SHIFT
#define WM8400_LDO3_VSEL_WIDTH

/*
 * R68 (0x44) - LDO 4 Control
 */
#define WM8400_LDO4_ENA
#define WM8400_LDO4_ENA_MASK
#define WM8400_LDO4_ENA_SHIFT
#define WM8400_LDO4_ENA_WIDTH
#define WM8400_LDO4_SWI
#define WM8400_LDO4_SWI_MASK
#define WM8400_LDO4_SWI_SHIFT
#define WM8400_LDO4_SWI_WIDTH
#define WM8400_LDO4_OPFLT
#define WM8400_LDO4_OPFLT_MASK
#define WM8400_LDO4_OPFLT_SHIFT
#define WM8400_LDO4_OPFLT_WIDTH
#define WM8400_LDO4_ERRACT
#define WM8400_LDO4_ERRACT_MASK
#define WM8400_LDO4_ERRACT_SHIFT
#define WM8400_LDO4_ERRACT_WIDTH
#define WM8400_LDO4_HIB_MODE
#define WM8400_LDO4_HIB_MODE_MASK
#define WM8400_LDO4_HIB_MODE_SHIFT
#define WM8400_LDO4_HIB_MODE_WIDTH
#define WM8400_LDO4_VIMG_MASK
#define WM8400_LDO4_VIMG_SHIFT
#define WM8400_LDO4_VIMG_WIDTH
#define WM8400_LDO4_VSEL_MASK
#define WM8400_LDO4_VSEL_SHIFT
#define WM8400_LDO4_VSEL_WIDTH

/*
 * R70 (0x46) - DCDC1 Control 1
 */
#define WM8400_DC1_ENA
#define WM8400_DC1_ENA_MASK
#define WM8400_DC1_ENA_SHIFT
#define WM8400_DC1_ENA_WIDTH
#define WM8400_DC1_ACTIVE
#define WM8400_DC1_ACTIVE_MASK
#define WM8400_DC1_ACTIVE_SHIFT
#define WM8400_DC1_ACTIVE_WIDTH
#define WM8400_DC1_SLEEP
#define WM8400_DC1_SLEEP_MASK
#define WM8400_DC1_SLEEP_SHIFT
#define WM8400_DC1_SLEEP_WIDTH
#define WM8400_DC1_OPFLT
#define WM8400_DC1_OPFLT_MASK
#define WM8400_DC1_OPFLT_SHIFT
#define WM8400_DC1_OPFLT_WIDTH
#define WM8400_DC1_ERRACT
#define WM8400_DC1_ERRACT_MASK
#define WM8400_DC1_ERRACT_SHIFT
#define WM8400_DC1_ERRACT_WIDTH
#define WM8400_DC1_HIB_MODE
#define WM8400_DC1_HIB_MODE_MASK
#define WM8400_DC1_HIB_MODE_SHIFT
#define WM8400_DC1_HIB_MODE_WIDTH
#define WM8400_DC1_SOFTST_MASK
#define WM8400_DC1_SOFTST_SHIFT
#define WM8400_DC1_SOFTST_WIDTH
#define WM8400_DC1_OV_PROT
#define WM8400_DC1_OV_PROT_MASK
#define WM8400_DC1_OV_PROT_SHIFT
#define WM8400_DC1_OV_PROT_WIDTH
#define WM8400_DC1_VSEL_MASK
#define WM8400_DC1_VSEL_SHIFT
#define WM8400_DC1_VSEL_WIDTH

/*
 * R71 (0x47) - DCDC1 Control 2
 */
#define WM8400_DC1_FRC_PWM
#define WM8400_DC1_FRC_PWM_MASK
#define WM8400_DC1_FRC_PWM_SHIFT
#define WM8400_DC1_FRC_PWM_WIDTH
#define WM8400_DC1_STBY_LIM_MASK
#define WM8400_DC1_STBY_LIM_SHIFT
#define WM8400_DC1_STBY_LIM_WIDTH
#define WM8400_DC1_ACT_LIM
#define WM8400_DC1_ACT_LIM_MASK
#define WM8400_DC1_ACT_LIM_SHIFT
#define WM8400_DC1_ACT_LIM_WIDTH
#define WM8400_DC1_VIMG_MASK
#define WM8400_DC1_VIMG_SHIFT
#define WM8400_DC1_VIMG_WIDTH

/*
 * R72 (0x48) - DCDC2 Control 1
 */
#define WM8400_DC2_ENA
#define WM8400_DC2_ENA_MASK
#define WM8400_DC2_ENA_SHIFT
#define WM8400_DC2_ENA_WIDTH
#define WM8400_DC2_ACTIVE
#define WM8400_DC2_ACTIVE_MASK
#define WM8400_DC2_ACTIVE_SHIFT
#define WM8400_DC2_ACTIVE_WIDTH
#define WM8400_DC2_SLEEP
#define WM8400_DC2_SLEEP_MASK
#define WM8400_DC2_SLEEP_SHIFT
#define WM8400_DC2_SLEEP_WIDTH
#define WM8400_DC2_OPFLT
#define WM8400_DC2_OPFLT_MASK
#define WM8400_DC2_OPFLT_SHIFT
#define WM8400_DC2_OPFLT_WIDTH
#define WM8400_DC2_ERRACT
#define WM8400_DC2_ERRACT_MASK
#define WM8400_DC2_ERRACT_SHIFT
#define WM8400_DC2_ERRACT_WIDTH
#define WM8400_DC2_HIB_MODE
#define WM8400_DC2_HIB_MODE_MASK
#define WM8400_DC2_HIB_MODE_SHIFT
#define WM8400_DC2_HIB_MODE_WIDTH
#define WM8400_DC2_SOFTST_MASK
#define WM8400_DC2_SOFTST_SHIFT
#define WM8400_DC2_SOFTST_WIDTH
#define WM8400_DC2_OV_PROT
#define WM8400_DC2_OV_PROT_MASK
#define WM8400_DC2_OV_PROT_SHIFT
#define WM8400_DC2_OV_PROT_WIDTH
#define WM8400_DC2_VSEL_MASK
#define WM8400_DC2_VSEL_SHIFT
#define WM8400_DC2_VSEL_WIDTH

/*
 * R73 (0x49) - DCDC2 Control 2
 */
#define WM8400_DC2_FRC_PWM
#define WM8400_DC2_FRC_PWM_MASK
#define WM8400_DC2_FRC_PWM_SHIFT
#define WM8400_DC2_FRC_PWM_WIDTH
#define WM8400_DC2_STBY_LIM_MASK
#define WM8400_DC2_STBY_LIM_SHIFT
#define WM8400_DC2_STBY_LIM_WIDTH
#define WM8400_DC2_ACT_LIM
#define WM8400_DC2_ACT_LIM_MASK
#define WM8400_DC2_ACT_LIM_SHIFT
#define WM8400_DC2_ACT_LIM_WIDTH
#define WM8400_DC2_VIMG_MASK
#define WM8400_DC2_VIMG_SHIFT
#define WM8400_DC2_VIMG_WIDTH

/*
 * R75 (0x4B) - Interface
 */
#define WM8400_AUTOINC
#define WM8400_AUTOINC_MASK
#define WM8400_AUTOINC_SHIFT
#define WM8400_AUTOINC_WIDTH
#define WM8400_ARA_ENA
#define WM8400_ARA_ENA_MASK
#define WM8400_ARA_ENA_SHIFT
#define WM8400_ARA_ENA_WIDTH
#define WM8400_SPI_CFG
#define WM8400_SPI_CFG_MASK
#define WM8400_SPI_CFG_SHIFT
#define WM8400_SPI_CFG_WIDTH

/*
 * R76 (0x4C) - PM GENERAL
 */
#define WM8400_CODEC_SOFTST
#define WM8400_CODEC_SOFTST_MASK
#define WM8400_CODEC_SOFTST_SHIFT
#define WM8400_CODEC_SOFTST_WIDTH
#define WM8400_CODEC_SOFTSD
#define WM8400_CODEC_SOFTSD_MASK
#define WM8400_CODEC_SOFTSD_SHIFT
#define WM8400_CODEC_SOFTSD_WIDTH
#define WM8400_CHIP_SOFTSD
#define WM8400_CHIP_SOFTSD_MASK
#define WM8400_CHIP_SOFTSD_SHIFT
#define WM8400_CHIP_SOFTSD_WIDTH
#define WM8400_DSLEEP1_POL
#define WM8400_DSLEEP1_POL_MASK
#define WM8400_DSLEEP1_POL_SHIFT
#define WM8400_DSLEEP1_POL_WIDTH
#define WM8400_DSLEEP2_POL
#define WM8400_DSLEEP2_POL_MASK
#define WM8400_DSLEEP2_POL_SHIFT
#define WM8400_DSLEEP2_POL_WIDTH
#define WM8400_PWR_STATE_MASK
#define WM8400_PWR_STATE_SHIFT
#define WM8400_PWR_STATE_WIDTH

/*
 * R78 (0x4E) - PM Shutdown Control
 */
#define WM8400_CHIP_GT150_ERRACT
#define WM8400_CHIP_GT150_ERRACT_MASK
#define WM8400_CHIP_GT150_ERRACT_SHIFT
#define WM8400_CHIP_GT150_ERRACT_WIDTH
#define WM8400_CHIP_GT115_ERRACT
#define WM8400_CHIP_GT115_ERRACT_MASK
#define WM8400_CHIP_GT115_ERRACT_SHIFT
#define WM8400_CHIP_GT115_ERRACT_WIDTH
#define WM8400_LINE_CMP_ERRACT
#define WM8400_LINE_CMP_ERRACT_MASK
#define WM8400_LINE_CMP_ERRACT_SHIFT
#define WM8400_LINE_CMP_ERRACT_WIDTH
#define WM8400_UVLO_ERRACT
#define WM8400_UVLO_ERRACT_MASK
#define WM8400_UVLO_ERRACT_SHIFT
#define WM8400_UVLO_ERRACT_WIDTH

/*
 * R79 (0x4F) - Interrupt Status 1
 */
#define WM8400_MICD_CINT
#define WM8400_MICD_CINT_MASK
#define WM8400_MICD_CINT_SHIFT
#define WM8400_MICD_CINT_WIDTH
#define WM8400_MICSCD_CINT
#define WM8400_MICSCD_CINT_MASK
#define WM8400_MICSCD_CINT_SHIFT
#define WM8400_MICSCD_CINT_WIDTH
#define WM8400_JDL_CINT
#define WM8400_JDL_CINT_MASK
#define WM8400_JDL_CINT_SHIFT
#define WM8400_JDL_CINT_WIDTH
#define WM8400_JDR_CINT
#define WM8400_JDR_CINT_MASK
#define WM8400_JDR_CINT_SHIFT
#define WM8400_JDR_CINT_WIDTH
#define WM8400_CODEC_SEQ_END_EINT
#define WM8400_CODEC_SEQ_END_EINT_MASK
#define WM8400_CODEC_SEQ_END_EINT_SHIFT
#define WM8400_CODEC_SEQ_END_EINT_WIDTH
#define WM8400_CDEL_TO_EINT
#define WM8400_CDEL_TO_EINT_MASK
#define WM8400_CDEL_TO_EINT_SHIFT
#define WM8400_CDEL_TO_EINT_WIDTH
#define WM8400_CHIP_GT150_EINT
#define WM8400_CHIP_GT150_EINT_MASK
#define WM8400_CHIP_GT150_EINT_SHIFT
#define WM8400_CHIP_GT150_EINT_WIDTH
#define WM8400_CHIP_GT115_EINT
#define WM8400_CHIP_GT115_EINT_MASK
#define WM8400_CHIP_GT115_EINT_SHIFT
#define WM8400_CHIP_GT115_EINT_WIDTH
#define WM8400_LINE_CMP_EINT
#define WM8400_LINE_CMP_EINT_MASK
#define WM8400_LINE_CMP_EINT_SHIFT
#define WM8400_LINE_CMP_EINT_WIDTH
#define WM8400_UVLO_EINT
#define WM8400_UVLO_EINT_MASK
#define WM8400_UVLO_EINT_SHIFT
#define WM8400_UVLO_EINT_WIDTH
#define WM8400_DC2_UV_EINT
#define WM8400_DC2_UV_EINT_MASK
#define WM8400_DC2_UV_EINT_SHIFT
#define WM8400_DC2_UV_EINT_WIDTH
#define WM8400_DC1_UV_EINT
#define WM8400_DC1_UV_EINT_MASK
#define WM8400_DC1_UV_EINT_SHIFT
#define WM8400_DC1_UV_EINT_WIDTH
#define WM8400_LDO4_UV_EINT
#define WM8400_LDO4_UV_EINT_MASK
#define WM8400_LDO4_UV_EINT_SHIFT
#define WM8400_LDO4_UV_EINT_WIDTH
#define WM8400_LDO3_UV_EINT
#define WM8400_LDO3_UV_EINT_MASK
#define WM8400_LDO3_UV_EINT_SHIFT
#define WM8400_LDO3_UV_EINT_WIDTH
#define WM8400_LDO2_UV_EINT
#define WM8400_LDO2_UV_EINT_MASK
#define WM8400_LDO2_UV_EINT_SHIFT
#define WM8400_LDO2_UV_EINT_WIDTH
#define WM8400_LDO1_UV_EINT
#define WM8400_LDO1_UV_EINT_MASK
#define WM8400_LDO1_UV_EINT_SHIFT
#define WM8400_LDO1_UV_EINT_WIDTH

/*
 * R80 (0x50) - Interrupt Status 1 Mask
 */
#define WM8400_IM_MICD_CINT
#define WM8400_IM_MICD_CINT_MASK
#define WM8400_IM_MICD_CINT_SHIFT
#define WM8400_IM_MICD_CINT_WIDTH
#define WM8400_IM_MICSCD_CINT
#define WM8400_IM_MICSCD_CINT_MASK
#define WM8400_IM_MICSCD_CINT_SHIFT
#define WM8400_IM_MICSCD_CINT_WIDTH
#define WM8400_IM_JDL_CINT
#define WM8400_IM_JDL_CINT_MASK
#define WM8400_IM_JDL_CINT_SHIFT
#define WM8400_IM_JDL_CINT_WIDTH
#define WM8400_IM_JDR_CINT
#define WM8400_IM_JDR_CINT_MASK
#define WM8400_IM_JDR_CINT_SHIFT
#define WM8400_IM_JDR_CINT_WIDTH
#define WM8400_IM_CODEC_SEQ_END_EINT
#define WM8400_IM_CODEC_SEQ_END_EINT_MASK
#define WM8400_IM_CODEC_SEQ_END_EINT_SHIFT
#define WM8400_IM_CODEC_SEQ_END_EINT_WIDTH
#define WM8400_IM_CDEL_TO_EINT
#define WM8400_IM_CDEL_TO_EINT_MASK
#define WM8400_IM_CDEL_TO_EINT_SHIFT
#define WM8400_IM_CDEL_TO_EINT_WIDTH
#define WM8400_IM_CHIP_GT150_EINT
#define WM8400_IM_CHIP_GT150_EINT_MASK
#define WM8400_IM_CHIP_GT150_EINT_SHIFT
#define WM8400_IM_CHIP_GT150_EINT_WIDTH
#define WM8400_IM_CHIP_GT115_EINT
#define WM8400_IM_CHIP_GT115_EINT_MASK
#define WM8400_IM_CHIP_GT115_EINT_SHIFT
#define WM8400_IM_CHIP_GT115_EINT_WIDTH
#define WM8400_IM_LINE_CMP_EINT
#define WM8400_IM_LINE_CMP_EINT_MASK
#define WM8400_IM_LINE_CMP_EINT_SHIFT
#define WM8400_IM_LINE_CMP_EINT_WIDTH
#define WM8400_IM_UVLO_EINT
#define WM8400_IM_UVLO_EINT_MASK
#define WM8400_IM_UVLO_EINT_SHIFT
#define WM8400_IM_UVLO_EINT_WIDTH
#define WM8400_IM_DC2_UV_EINT
#define WM8400_IM_DC2_UV_EINT_MASK
#define WM8400_IM_DC2_UV_EINT_SHIFT
#define WM8400_IM_DC2_UV_EINT_WIDTH
#define WM8400_IM_DC1_UV_EINT
#define WM8400_IM_DC1_UV_EINT_MASK
#define WM8400_IM_DC1_UV_EINT_SHIFT
#define WM8400_IM_DC1_UV_EINT_WIDTH
#define WM8400_IM_LDO4_UV_EINT
#define WM8400_IM_LDO4_UV_EINT_MASK
#define WM8400_IM_LDO4_UV_EINT_SHIFT
#define WM8400_IM_LDO4_UV_EINT_WIDTH
#define WM8400_IM_LDO3_UV_EINT
#define WM8400_IM_LDO3_UV_EINT_MASK
#define WM8400_IM_LDO3_UV_EINT_SHIFT
#define WM8400_IM_LDO3_UV_EINT_WIDTH
#define WM8400_IM_LDO2_UV_EINT
#define WM8400_IM_LDO2_UV_EINT_MASK
#define WM8400_IM_LDO2_UV_EINT_SHIFT
#define WM8400_IM_LDO2_UV_EINT_WIDTH
#define WM8400_IM_LDO1_UV_EINT
#define WM8400_IM_LDO1_UV_EINT_MASK
#define WM8400_IM_LDO1_UV_EINT_SHIFT
#define WM8400_IM_LDO1_UV_EINT_WIDTH

/*
 * R81 (0x51) - Interrupt Levels
 */
#define WM8400_MICD_LVL
#define WM8400_MICD_LVL_MASK
#define WM8400_MICD_LVL_SHIFT
#define WM8400_MICD_LVL_WIDTH
#define WM8400_MICSCD_LVL
#define WM8400_MICSCD_LVL_MASK
#define WM8400_MICSCD_LVL_SHIFT
#define WM8400_MICSCD_LVL_WIDTH
#define WM8400_JDL_LVL
#define WM8400_JDL_LVL_MASK
#define WM8400_JDL_LVL_SHIFT
#define WM8400_JDL_LVL_WIDTH
#define WM8400_JDR_LVL
#define WM8400_JDR_LVL_MASK
#define WM8400_JDR_LVL_SHIFT
#define WM8400_JDR_LVL_WIDTH
#define WM8400_CODEC_SEQ_END_LVL
#define WM8400_CODEC_SEQ_END_LVL_MASK
#define WM8400_CODEC_SEQ_END_LVL_SHIFT
#define WM8400_CODEC_SEQ_END_LVL_WIDTH
#define WM8400_CDEL_TO_LVL
#define WM8400_CDEL_TO_LVL_MASK
#define WM8400_CDEL_TO_LVL_SHIFT
#define WM8400_CDEL_TO_LVL_WIDTH
#define WM8400_CHIP_GT150_LVL
#define WM8400_CHIP_GT150_LVL_MASK
#define WM8400_CHIP_GT150_LVL_SHIFT
#define WM8400_CHIP_GT150_LVL_WIDTH
#define WM8400_CHIP_GT115_LVL
#define WM8400_CHIP_GT115_LVL_MASK
#define WM8400_CHIP_GT115_LVL_SHIFT
#define WM8400_CHIP_GT115_LVL_WIDTH
#define WM8400_LINE_CMP_LVL
#define WM8400_LINE_CMP_LVL_MASK
#define WM8400_LINE_CMP_LVL_SHIFT
#define WM8400_LINE_CMP_LVL_WIDTH
#define WM8400_UVLO_LVL
#define WM8400_UVLO_LVL_MASK
#define WM8400_UVLO_LVL_SHIFT
#define WM8400_UVLO_LVL_WIDTH
#define WM8400_DC2_UV_LVL
#define WM8400_DC2_UV_LVL_MASK
#define WM8400_DC2_UV_LVL_SHIFT
#define WM8400_DC2_UV_LVL_WIDTH
#define WM8400_DC1_UV_LVL
#define WM8400_DC1_UV_LVL_MASK
#define WM8400_DC1_UV_LVL_SHIFT
#define WM8400_DC1_UV_LVL_WIDTH
#define WM8400_LDO4_UV_LVL
#define WM8400_LDO4_UV_LVL_MASK
#define WM8400_LDO4_UV_LVL_SHIFT
#define WM8400_LDO4_UV_LVL_WIDTH
#define WM8400_LDO3_UV_LVL
#define WM8400_LDO3_UV_LVL_MASK
#define WM8400_LDO3_UV_LVL_SHIFT
#define WM8400_LDO3_UV_LVL_WIDTH
#define WM8400_LDO2_UV_LVL
#define WM8400_LDO2_UV_LVL_MASK
#define WM8400_LDO2_UV_LVL_SHIFT
#define WM8400_LDO2_UV_LVL_WIDTH
#define WM8400_LDO1_UV_LVL
#define WM8400_LDO1_UV_LVL_MASK
#define WM8400_LDO1_UV_LVL_SHIFT
#define WM8400_LDO1_UV_LVL_WIDTH

/*
 * R82 (0x52) - Shutdown Reason
 */
#define WM8400_SDR_CHIP_SOFTSD
#define WM8400_SDR_CHIP_SOFTSD_MASK
#define WM8400_SDR_CHIP_SOFTSD_SHIFT
#define WM8400_SDR_CHIP_SOFTSD_WIDTH
#define WM8400_SDR_NPDN
#define WM8400_SDR_NPDN_MASK
#define WM8400_SDR_NPDN_SHIFT
#define WM8400_SDR_NPDN_WIDTH
#define WM8400_SDR_CHIP_GT150
#define WM8400_SDR_CHIP_GT150_MASK
#define WM8400_SDR_CHIP_GT150_SHIFT
#define WM8400_SDR_CHIP_GT150_WIDTH
#define WM8400_SDR_CHIP_GT115
#define WM8400_SDR_CHIP_GT115_MASK
#define WM8400_SDR_CHIP_GT115_SHIFT
#define WM8400_SDR_CHIP_GT115_WIDTH
#define WM8400_SDR_LINE_CMP
#define WM8400_SDR_LINE_CMP_MASK
#define WM8400_SDR_LINE_CMP_SHIFT
#define WM8400_SDR_LINE_CMP_WIDTH
#define WM8400_SDR_UVLO
#define WM8400_SDR_UVLO_MASK
#define WM8400_SDR_UVLO_SHIFT
#define WM8400_SDR_UVLO_WIDTH
#define WM8400_SDR_DC2_UV
#define WM8400_SDR_DC2_UV_MASK
#define WM8400_SDR_DC2_UV_SHIFT
#define WM8400_SDR_DC2_UV_WIDTH
#define WM8400_SDR_DC1_UV
#define WM8400_SDR_DC1_UV_MASK
#define WM8400_SDR_DC1_UV_SHIFT
#define WM8400_SDR_DC1_UV_WIDTH
#define WM8400_SDR_LDO4_UV
#define WM8400_SDR_LDO4_UV_MASK
#define WM8400_SDR_LDO4_UV_SHIFT
#define WM8400_SDR_LDO4_UV_WIDTH
#define WM8400_SDR_LDO3_UV
#define WM8400_SDR_LDO3_UV_MASK
#define WM8400_SDR_LDO3_UV_SHIFT
#define WM8400_SDR_LDO3_UV_WIDTH
#define WM8400_SDR_LDO2_UV
#define WM8400_SDR_LDO2_UV_MASK
#define WM8400_SDR_LDO2_UV_SHIFT
#define WM8400_SDR_LDO2_UV_WIDTH
#define WM8400_SDR_LDO1_UV
#define WM8400_SDR_LDO1_UV_MASK
#define WM8400_SDR_LDO1_UV_SHIFT
#define WM8400_SDR_LDO1_UV_WIDTH

/*
 * R84 (0x54) - Line Circuits
 */
#define WM8400_BG_LINE_COMP
#define WM8400_BG_LINE_COMP_MASK
#define WM8400_BG_LINE_COMP_SHIFT
#define WM8400_BG_LINE_COMP_WIDTH
#define WM8400_LINE_CMP_VTHI_MASK
#define WM8400_LINE_CMP_VTHI_SHIFT
#define WM8400_LINE_CMP_VTHI_WIDTH
#define WM8400_LINE_CMP_VTHD_MASK
#define WM8400_LINE_CMP_VTHD_SHIFT
#define WM8400_LINE_CMP_VTHD_WIDTH

#endif