/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (C) 2019-2020 ARM Limited or its affiliates. */ #include <linux/bitops.h> #define POWER_DOWN_ENABLE … #define POWER_DOWN_DISABLE … /* hwrng quality: bits of true entropy per 1024 bits of input */ #define CC_TRNG_QUALITY … /* CryptoCell TRNG HW definitions */ #define CC_TRNG_NUM_OF_ROSCS … /* The number of words generated in the entropy holding register (EHR) * 6 words (192 bit) according to HW implementation */ #define CC_TRNG_EHR_IN_WORDS … #define CC_TRNG_EHR_IN_BITS … #define CC_HOST_RNG_IRQ_MASK … /* RNG interrupt mask */ #define CC_RNG_INT_MASK … // -------------------------------------- // BLOCK: RNG // -------------------------------------- #define CC_RNG_IMR_REG_OFFSET … #define CC_RNG_IMR_EHR_VALID_INT_MASK_BIT_SHIFT … #define CC_RNG_IMR_AUTOCORR_ERR_INT_MASK_BIT_SHIFT … #define CC_RNG_IMR_CRNGT_ERR_INT_MASK_BIT_SHIFT … #define CC_RNG_IMR_VN_ERR_INT_MASK_BIT_SHIFT … #define CC_RNG_IMR_WATCHDOG_INT_MASK_BIT_SHIFT … #define CC_RNG_ISR_REG_OFFSET … #define CC_RNG_ISR_EHR_VALID_BIT_SHIFT … #define CC_RNG_ISR_EHR_VALID_BIT_SIZE … #define CC_RNG_ISR_AUTOCORR_ERR_BIT_SHIFT … #define CC_RNG_ISR_AUTOCORR_ERR_BIT_SIZE … #define CC_RNG_ISR_CRNGT_ERR_BIT_SHIFT … #define CC_RNG_ISR_CRNGT_ERR_BIT_SIZE … #define CC_RNG_ISR_WATCHDOG_BIT_SHIFT … #define CC_RNG_ISR_WATCHDOG_BIT_SIZE … #define CC_RNG_ICR_REG_OFFSET … #define CC_TRNG_CONFIG_REG_OFFSET … #define CC_EHR_DATA_0_REG_OFFSET … #define CC_RND_SOURCE_ENABLE_REG_OFFSET … #define CC_SAMPLE_CNT1_REG_OFFSET … #define CC_TRNG_DEBUG_CONTROL_REG_OFFSET … #define CC_RNG_SW_RESET_REG_OFFSET … #define CC_RNG_CLK_ENABLE_REG_OFFSET … #define CC_RNG_DMA_ENABLE_REG_OFFSET … #define CC_RNG_WATCHDOG_VAL_REG_OFFSET … // -------------------------------------- // BLOCK: SEC_HOST_RGF // -------------------------------------- #define CC_HOST_RGF_IRR_REG_OFFSET … #define CC_HOST_RGF_IRR_RNG_INT_BIT_SHIFT … #define CC_HOST_RGF_IMR_REG_OFFSET … #define CC_HOST_RGF_ICR_REG_OFFSET … #define CC_HOST_POWER_DOWN_EN_REG_OFFSET … // -------------------------------------- // BLOCK: NVM // -------------------------------------- #define CC_NVM_IS_IDLE_REG_OFFSET … #define CC_NVM_IS_IDLE_VALUE_BIT_SHIFT … #define CC_NVM_IS_IDLE_VALUE_BIT_SIZE …
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