linux/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_7_0_sh_mask.h

/*
 * Copyright 2020 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef _umc_6_7_0_SH_MASK_HEADER
#define _umc_6_7_0_SH_MASK_HEADER


// addressBlock: umc_w_phy_umc0_mca_ip_umc0_mca_map
//MCA_UMC_UMC0_MCUMC_STATUST0
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrorCode__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrorCodeExt__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV22__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__AddrLsb__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV30__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrCoreId__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV38__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Scrub__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV41__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Poison__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Deferred__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__UECC__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__CECC__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV47__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Transparent__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__SyndV__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV54__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__TCC__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrCoreIdVal__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__PCC__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__AddrV__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__MiscV__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__En__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__UC__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Overflow__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__Val__SHIFT
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrorCode_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrorCodeExt_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV22_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__AddrLsb_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV30_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrCoreId_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV38_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Scrub_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV41_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Poison_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Deferred_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__UECC_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__CECC_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV47_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Transparent_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__SyndV_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__RESERV54_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__TCC_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__ErrCoreIdVal_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__PCC_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__AddrV_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__MiscV_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__En_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__UC_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Overflow_MASK
#define MCA_UMC_UMC0_MCUMC_STATUST0__Val_MASK
//MCA_UMC_UMC0_MCUMC_ADDRT0
#define MCA_UMC_UMC0_MCUMC_ADDRT0__ErrorAddr__SHIFT
#define MCA_UMC_UMC0_MCUMC_ADDRT0__Reserved__SHIFT
#define MCA_UMC_UMC0_MCUMC_ADDRT0__ErrorAddr_MASK
#define MCA_UMC_UMC0_MCUMC_ADDRT0__Reserved_MASK


// addressBlock: umc_w_phy_umc0_umcch0_umcchdec
//UMCCH0_0_BaseAddrCS0
#define UMCCH0_0_BaseAddrCS0__CSEnable__SHIFT
#define UMCCH0_0_BaseAddrCS0__BaseAddr__SHIFT
#define UMCCH0_0_BaseAddrCS0__CSEnable_MASK
#define UMCCH0_0_BaseAddrCS0__BaseAddr_MASK
//UMCCH0_0_AddrMaskCS01
#define UMCCH0_0_AddrMaskCS01__AddrMask__SHIFT
#define UMCCH0_0_AddrMaskCS01__AddrMask_MASK
//UMCCH0_0_AddrSelCS01
#define UMCCH0_0_AddrSelCS01__BankBit0__SHIFT
#define UMCCH0_0_AddrSelCS01__BankBit1__SHIFT
#define UMCCH0_0_AddrSelCS01__BankBit2__SHIFT
#define UMCCH0_0_AddrSelCS01__BankBit3__SHIFT
#define UMCCH0_0_AddrSelCS01__BankBit4__SHIFT
#define UMCCH0_0_AddrSelCS01__RowLo__SHIFT
#define UMCCH0_0_AddrSelCS01__RowHi__SHIFT
#define UMCCH0_0_AddrSelCS01__BankBit0_MASK
#define UMCCH0_0_AddrSelCS01__BankBit1_MASK
#define UMCCH0_0_AddrSelCS01__BankBit2_MASK
#define UMCCH0_0_AddrSelCS01__BankBit3_MASK
#define UMCCH0_0_AddrSelCS01__BankBit4_MASK
#define UMCCH0_0_AddrSelCS01__RowLo_MASK
#define UMCCH0_0_AddrSelCS01__RowHi_MASK
//UMCCH0_0_AddrHashBank0
#define UMCCH0_0_AddrHashBank0__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank0__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank0__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank0__XorEnable_MASK
#define UMCCH0_0_AddrHashBank0__ColXor_MASK
#define UMCCH0_0_AddrHashBank0__RowXor_MASK
//UMCCH0_0_AddrHashBank1
#define UMCCH0_0_AddrHashBank1__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank1__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank1__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank1__XorEnable_MASK
#define UMCCH0_0_AddrHashBank1__ColXor_MASK
#define UMCCH0_0_AddrHashBank1__RowXor_MASK
//UMCCH0_0_AddrHashBank2
#define UMCCH0_0_AddrHashBank2__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank2__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank2__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank2__XorEnable_MASK
#define UMCCH0_0_AddrHashBank2__ColXor_MASK
#define UMCCH0_0_AddrHashBank2__RowXor_MASK
//UMCCH0_0_AddrHashBank3
#define UMCCH0_0_AddrHashBank3__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank3__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank3__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank3__XorEnable_MASK
#define UMCCH0_0_AddrHashBank3__ColXor_MASK
#define UMCCH0_0_AddrHashBank3__RowXor_MASK
//UMCCH0_0_AddrHashBank4
#define UMCCH0_0_AddrHashBank4__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank4__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank4__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank4__XorEnable_MASK
#define UMCCH0_0_AddrHashBank4__ColXor_MASK
#define UMCCH0_0_AddrHashBank4__RowXor_MASK
//UMCCH0_0_AddrHashBank5
#define UMCCH0_0_AddrHashBank5__XorEnable__SHIFT
#define UMCCH0_0_AddrHashBank5__ColXor__SHIFT
#define UMCCH0_0_AddrHashBank5__RowXor__SHIFT
#define UMCCH0_0_AddrHashBank5__XorEnable_MASK
#define UMCCH0_0_AddrHashBank5__ColXor_MASK
#define UMCCH0_0_AddrHashBank5__RowXor_MASK
//UMCCH0_0_UMC_CONFIG
#define UMCCH0_0_UMC_CONFIG__DDR_TYPE__SHIFT
#define UMCCH0_0_UMC_CONFIG__BurstLength__SHIFT
#define UMCCH0_0_UMC_CONFIG__BurstCtrl__SHIFT
#define UMCCH0_0_UMC_CONFIG__DramReady__SHIFT
#define UMCCH0_0_UMC_CONFIG__DDR_TYPE_MASK
#define UMCCH0_0_UMC_CONFIG__BurstLength_MASK
#define UMCCH0_0_UMC_CONFIG__BurstCtrl_MASK
#define UMCCH0_0_UMC_CONFIG__DramReady_MASK
//UMCCH0_0_EccCtrl
#define UMCCH0_0_EccCtrl__WrEccEn__SHIFT
#define UMCCH0_0_EccCtrl__EccReplayEn__SHIFT
#define UMCCH0_0_EccCtrl__UCFatalEn__SHIFT
#define UMCCH0_0_EccCtrl__RdEccEn__SHIFT
#define UMCCH0_0_EccCtrl__PoisonFatalDis__SHIFT
#define UMCCH0_0_EccCtrl__PoisonInhibit__SHIFT
#define UMCCH0_0_EccCtrl__WrEccEn_MASK
#define UMCCH0_0_EccCtrl__EccReplayEn_MASK
#define UMCCH0_0_EccCtrl__UCFatalEn_MASK
#define UMCCH0_0_EccCtrl__RdEccEn_MASK
#define UMCCH0_0_EccCtrl__PoisonFatalDis_MASK
#define UMCCH0_0_EccCtrl__PoisonInhibit_MASK
//UMCCH0_0_UmcLocalCap
#define UMCCH0_0_UmcLocalCap__EccDis__SHIFT
#define UMCCH0_0_UmcLocalCap__Spare__SHIFT
#define UMCCH0_0_UmcLocalCap__WrDis__SHIFT
#define UMCCH0_0_UmcLocalCap__EccDis_MASK
#define UMCCH0_0_UmcLocalCap__Spare_MASK
#define UMCCH0_0_UmcLocalCap__WrDis_MASK
//UMCCH0_0_EccErrCntSel
#define UMCCH0_0_EccErrCntSel__EccErrCntCsSel__SHIFT
#define UMCCH0_0_EccErrCntSel__EccErrInt__SHIFT
#define UMCCH0_0_EccErrCntSel__EccErrCntEn__SHIFT
#define UMCCH0_0_EccErrCntSel__EccErrCntCsSel_MASK
#define UMCCH0_0_EccErrCntSel__EccErrInt_MASK
#define UMCCH0_0_EccErrCntSel__EccErrCntEn_MASK
//UMCCH0_0_EccErrCnt
#define UMCCH0_0_EccErrCnt__EccErrCnt__SHIFT
#define UMCCH0_0_EccErrCnt__EccErrCnt_MASK
//UMCCH0_0_PerfMonCtlClk
#define UMCCH0_0_PerfMonCtlClk__GlblResetMsk__SHIFT
#define UMCCH0_0_PerfMonCtlClk__ClkGate__SHIFT
#define UMCCH0_0_PerfMonCtlClk__GlblReset__SHIFT
#define UMCCH0_0_PerfMonCtlClk__GlblMonEn__SHIFT
#define UMCCH0_0_PerfMonCtlClk__NumCounters__SHIFT
#define UMCCH0_0_PerfMonCtlClk__CtrClkEn__SHIFT
#define UMCCH0_0_PerfMonCtlClk__GlblResetMsk_MASK
#define UMCCH0_0_PerfMonCtlClk__ClkGate_MASK
#define UMCCH0_0_PerfMonCtlClk__GlblReset_MASK
#define UMCCH0_0_PerfMonCtlClk__GlblMonEn_MASK
#define UMCCH0_0_PerfMonCtlClk__NumCounters_MASK
#define UMCCH0_0_PerfMonCtlClk__CtrClkEn_MASK
//UMCCH0_0_PerfMonCtrClk_Lo
#define UMCCH0_0_PerfMonCtrClk_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtrClk_Lo__Data_MASK
//UMCCH0_0_PerfMonCtrClk_Hi
#define UMCCH0_0_PerfMonCtrClk_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtrClk_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtrClk_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtrClk_Hi__Overflow_MASK
//UMCCH0_0_PerfMonCtl1
#define UMCCH0_0_PerfMonCtl1__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl1__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl1__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl1__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl1__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl1__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl1__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl1__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl1__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl1__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl1__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl1__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl1__BankSel_MASK
#define UMCCH0_0_PerfMonCtl1__VCSel_MASK
#define UMCCH0_0_PerfMonCtl1__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl1__Enable_MASK
//UMCCH0_0_PerfMonCtr1_Lo
#define UMCCH0_0_PerfMonCtr1_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr1_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr1_Hi
#define UMCCH0_0_PerfMonCtr1_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr1_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr1_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr1_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr1_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr1_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr1_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr1_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl2
#define UMCCH0_0_PerfMonCtl2__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl2__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl2__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl2__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl2__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl2__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl2__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl2__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl2__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl2__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl2__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl2__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl2__BankSel_MASK
#define UMCCH0_0_PerfMonCtl2__VCSel_MASK
#define UMCCH0_0_PerfMonCtl2__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl2__Enable_MASK
//UMCCH0_0_PerfMonCtr2_Lo
#define UMCCH0_0_PerfMonCtr2_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr2_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr2_Hi
#define UMCCH0_0_PerfMonCtr2_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr2_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr2_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr2_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr2_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr2_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr2_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr2_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl3
#define UMCCH0_0_PerfMonCtl3__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl3__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl3__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl3__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl3__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl3__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl3__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl3__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl3__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl3__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl3__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl3__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl3__BankSel_MASK
#define UMCCH0_0_PerfMonCtl3__VCSel_MASK
#define UMCCH0_0_PerfMonCtl3__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl3__Enable_MASK
//UMCCH0_0_PerfMonCtr3_Lo
#define UMCCH0_0_PerfMonCtr3_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr3_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr3_Hi
#define UMCCH0_0_PerfMonCtr3_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr3_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr3_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr3_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr3_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr3_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr3_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr3_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl4
#define UMCCH0_0_PerfMonCtl4__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl4__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl4__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl4__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl4__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl4__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl4__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl4__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl4__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl4__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl4__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl4__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl4__BankSel_MASK
#define UMCCH0_0_PerfMonCtl4__VCSel_MASK
#define UMCCH0_0_PerfMonCtl4__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl4__Enable_MASK
//UMCCH0_0_PerfMonCtr4_Lo
#define UMCCH0_0_PerfMonCtr4_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr4_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr4_Hi
#define UMCCH0_0_PerfMonCtr4_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr4_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr4_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr4_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr4_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr4_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr4_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr4_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl5
#define UMCCH0_0_PerfMonCtl5__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl5__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl5__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl5__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl5__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl5__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl5__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl5__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl5__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl5__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl5__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl5__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl5__BankSel_MASK
#define UMCCH0_0_PerfMonCtl5__VCSel_MASK
#define UMCCH0_0_PerfMonCtl5__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl5__Enable_MASK
//UMCCH0_0_PerfMonCtr5_Lo
#define UMCCH0_0_PerfMonCtr5_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr5_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr5_Hi
#define UMCCH0_0_PerfMonCtr5_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr5_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr5_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr5_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr5_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr5_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr5_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr5_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl6
#define UMCCH0_0_PerfMonCtl6__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl6__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl6__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl6__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl6__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl6__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl6__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl6__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl6__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl6__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl6__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl6__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl6__BankSel_MASK
#define UMCCH0_0_PerfMonCtl6__VCSel_MASK
#define UMCCH0_0_PerfMonCtl6__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl6__Enable_MASK
//UMCCH0_0_PerfMonCtr6_Lo
#define UMCCH0_0_PerfMonCtr6_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr6_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr6_Hi
#define UMCCH0_0_PerfMonCtr6_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr6_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr6_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr6_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr6_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr6_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr6_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr6_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl7
#define UMCCH0_0_PerfMonCtl7__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl7__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl7__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl7__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl7__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl7__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl7__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl7__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl7__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl7__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl7__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl7__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl7__BankSel_MASK
#define UMCCH0_0_PerfMonCtl7__VCSel_MASK
#define UMCCH0_0_PerfMonCtl7__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl7__Enable_MASK
//UMCCH0_0_PerfMonCtr7_Lo
#define UMCCH0_0_PerfMonCtr7_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr7_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr7_Hi
#define UMCCH0_0_PerfMonCtr7_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr7_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr7_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr7_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr7_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr7_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr7_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr7_Hi__ThreshCnt_MASK
//UMCCH0_0_PerfMonCtl8
#define UMCCH0_0_PerfMonCtl8__EventSelect__SHIFT
#define UMCCH0_0_PerfMonCtl8__RdWrMask__SHIFT
#define UMCCH0_0_PerfMonCtl8__PriorityMask__SHIFT
#define UMCCH0_0_PerfMonCtl8__ReqSizeMask__SHIFT
#define UMCCH0_0_PerfMonCtl8__BankSel__SHIFT
#define UMCCH0_0_PerfMonCtl8__VCSel__SHIFT
#define UMCCH0_0_PerfMonCtl8__SubChanMask__SHIFT
#define UMCCH0_0_PerfMonCtl8__Enable__SHIFT
#define UMCCH0_0_PerfMonCtl8__EventSelect_MASK
#define UMCCH0_0_PerfMonCtl8__RdWrMask_MASK
#define UMCCH0_0_PerfMonCtl8__PriorityMask_MASK
#define UMCCH0_0_PerfMonCtl8__ReqSizeMask_MASK
#define UMCCH0_0_PerfMonCtl8__BankSel_MASK
#define UMCCH0_0_PerfMonCtl8__VCSel_MASK
#define UMCCH0_0_PerfMonCtl8__SubChanMask_MASK
#define UMCCH0_0_PerfMonCtl8__Enable_MASK
//UMCCH0_0_PerfMonCtr8_Lo
#define UMCCH0_0_PerfMonCtr8_Lo__Data__SHIFT
#define UMCCH0_0_PerfMonCtr8_Lo__Data_MASK
//UMCCH0_0_PerfMonCtr8_Hi
#define UMCCH0_0_PerfMonCtr8_Hi__Data__SHIFT
#define UMCCH0_0_PerfMonCtr8_Hi__Overflow__SHIFT
#define UMCCH0_0_PerfMonCtr8_Hi__ThreshCntEn__SHIFT
#define UMCCH0_0_PerfMonCtr8_Hi__ThreshCnt__SHIFT
#define UMCCH0_0_PerfMonCtr8_Hi__Data_MASK
#define UMCCH0_0_PerfMonCtr8_Hi__Overflow_MASK
#define UMCCH0_0_PerfMonCtr8_Hi__ThreshCntEn_MASK
#define UMCCH0_0_PerfMonCtr8_Hi__ThreshCnt_MASK


// addressBlock: umc_w_phy_umc0_umcch1_umcchdec
//UMCCH1_0_BaseAddrCS0
#define UMCCH1_0_BaseAddrCS0__CSEnable__SHIFT
#define UMCCH1_0_BaseAddrCS0__BaseAddr__SHIFT
#define UMCCH1_0_BaseAddrCS0__CSEnable_MASK
#define UMCCH1_0_BaseAddrCS0__BaseAddr_MASK
//UMCCH1_0_AddrMaskCS01
#define UMCCH1_0_AddrMaskCS01__AddrMask__SHIFT
#define UMCCH1_0_AddrMaskCS01__AddrMask_MASK
//UMCCH1_0_AddrSelCS01
#define UMCCH1_0_AddrSelCS01__BankBit0__SHIFT
#define UMCCH1_0_AddrSelCS01__BankBit1__SHIFT
#define UMCCH1_0_AddrSelCS01__BankBit2__SHIFT
#define UMCCH1_0_AddrSelCS01__BankBit3__SHIFT
#define UMCCH1_0_AddrSelCS01__BankBit4__SHIFT
#define UMCCH1_0_AddrSelCS01__RowLo__SHIFT
#define UMCCH1_0_AddrSelCS01__RowHi__SHIFT
#define UMCCH1_0_AddrSelCS01__BankBit0_MASK
#define UMCCH1_0_AddrSelCS01__BankBit1_MASK
#define UMCCH1_0_AddrSelCS01__BankBit2_MASK
#define UMCCH1_0_AddrSelCS01__BankBit3_MASK
#define UMCCH1_0_AddrSelCS01__BankBit4_MASK
#define UMCCH1_0_AddrSelCS01__RowLo_MASK
#define UMCCH1_0_AddrSelCS01__RowHi_MASK
//UMCCH1_0_AddrHashBank0
#define UMCCH1_0_AddrHashBank0__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank0__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank0__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank0__XorEnable_MASK
#define UMCCH1_0_AddrHashBank0__ColXor_MASK
#define UMCCH1_0_AddrHashBank0__RowXor_MASK
//UMCCH1_0_AddrHashBank1
#define UMCCH1_0_AddrHashBank1__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank1__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank1__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank1__XorEnable_MASK
#define UMCCH1_0_AddrHashBank1__ColXor_MASK
#define UMCCH1_0_AddrHashBank1__RowXor_MASK
//UMCCH1_0_AddrHashBank2
#define UMCCH1_0_AddrHashBank2__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank2__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank2__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank2__XorEnable_MASK
#define UMCCH1_0_AddrHashBank2__ColXor_MASK
#define UMCCH1_0_AddrHashBank2__RowXor_MASK
//UMCCH1_0_AddrHashBank3
#define UMCCH1_0_AddrHashBank3__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank3__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank3__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank3__XorEnable_MASK
#define UMCCH1_0_AddrHashBank3__ColXor_MASK
#define UMCCH1_0_AddrHashBank3__RowXor_MASK
//UMCCH1_0_AddrHashBank4
#define UMCCH1_0_AddrHashBank4__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank4__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank4__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank4__XorEnable_MASK
#define UMCCH1_0_AddrHashBank4__ColXor_MASK
#define UMCCH1_0_AddrHashBank4__RowXor_MASK
//UMCCH1_0_AddrHashBank5
#define UMCCH1_0_AddrHashBank5__XorEnable__SHIFT
#define UMCCH1_0_AddrHashBank5__ColXor__SHIFT
#define UMCCH1_0_AddrHashBank5__RowXor__SHIFT
#define UMCCH1_0_AddrHashBank5__XorEnable_MASK
#define UMCCH1_0_AddrHashBank5__ColXor_MASK
#define UMCCH1_0_AddrHashBank5__RowXor_MASK
//UMCCH1_0_UMC_CONFIG
#define UMCCH1_0_UMC_CONFIG__DDR_TYPE__SHIFT
#define UMCCH1_0_UMC_CONFIG__BurstLength__SHIFT
#define UMCCH1_0_UMC_CONFIG__BurstCtrl__SHIFT
#define UMCCH1_0_UMC_CONFIG__DramReady__SHIFT
#define UMCCH1_0_UMC_CONFIG__DDR_TYPE_MASK
#define UMCCH1_0_UMC_CONFIG__BurstLength_MASK
#define UMCCH1_0_UMC_CONFIG__BurstCtrl_MASK
#define UMCCH1_0_UMC_CONFIG__DramReady_MASK
//UMCCH1_0_EccCtrl
#define UMCCH1_0_EccCtrl__WrEccEn__SHIFT
#define UMCCH1_0_EccCtrl__EccReplayEn__SHIFT
#define UMCCH1_0_EccCtrl__UCFatalEn__SHIFT
#define UMCCH1_0_EccCtrl__RdEccEn__SHIFT
#define UMCCH1_0_EccCtrl__PoisonFatalDis__SHIFT
#define UMCCH1_0_EccCtrl__PoisonInhibit__SHIFT
#define UMCCH1_0_EccCtrl__WrEccEn_MASK
#define UMCCH1_0_EccCtrl__EccReplayEn_MASK
#define UMCCH1_0_EccCtrl__UCFatalEn_MASK
#define UMCCH1_0_EccCtrl__RdEccEn_MASK
#define UMCCH1_0_EccCtrl__PoisonFatalDis_MASK
#define UMCCH1_0_EccCtrl__PoisonInhibit_MASK
//UMCCH1_0_UmcLocalCap
#define UMCCH1_0_UmcLocalCap__EccDis__SHIFT
#define UMCCH1_0_UmcLocalCap__Spare__SHIFT
#define UMCCH1_0_UmcLocalCap__WrDis__SHIFT
#define UMCCH1_0_UmcLocalCap__EccDis_MASK
#define UMCCH1_0_UmcLocalCap__Spare_MASK
#define UMCCH1_0_UmcLocalCap__WrDis_MASK
//UMCCH1_0_EccErrCntSel
#define UMCCH1_0_EccErrCntSel__EccErrCntCsSel__SHIFT
#define UMCCH1_0_EccErrCntSel__EccErrInt__SHIFT
#define UMCCH1_0_EccErrCntSel__EccErrCntEn__SHIFT
#define UMCCH1_0_EccErrCntSel__EccErrCntCsSel_MASK
#define UMCCH1_0_EccErrCntSel__EccErrInt_MASK
#define UMCCH1_0_EccErrCntSel__EccErrCntEn_MASK
//UMCCH1_0_EccErrCnt
#define UMCCH1_0_EccErrCnt__EccErrCnt__SHIFT
#define UMCCH1_0_EccErrCnt__EccErrCnt_MASK
//UMCCH1_0_PerfMonCtlClk
#define UMCCH1_0_PerfMonCtlClk__GlblResetMsk__SHIFT
#define UMCCH1_0_PerfMonCtlClk__ClkGate__SHIFT
#define UMCCH1_0_PerfMonCtlClk__GlblReset__SHIFT
#define UMCCH1_0_PerfMonCtlClk__GlblMonEn__SHIFT
#define UMCCH1_0_PerfMonCtlClk__NumCounters__SHIFT
#define UMCCH1_0_PerfMonCtlClk__CtrClkEn__SHIFT
#define UMCCH1_0_PerfMonCtlClk__GlblResetMsk_MASK
#define UMCCH1_0_PerfMonCtlClk__ClkGate_MASK
#define UMCCH1_0_PerfMonCtlClk__GlblReset_MASK
#define UMCCH1_0_PerfMonCtlClk__GlblMonEn_MASK
#define UMCCH1_0_PerfMonCtlClk__NumCounters_MASK
#define UMCCH1_0_PerfMonCtlClk__CtrClkEn_MASK
//UMCCH1_0_PerfMonCtrClk_Lo
#define UMCCH1_0_PerfMonCtrClk_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtrClk_Lo__Data_MASK
//UMCCH1_0_PerfMonCtrClk_Hi
#define UMCCH1_0_PerfMonCtrClk_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtrClk_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtrClk_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtrClk_Hi__Overflow_MASK
//UMCCH1_0_PerfMonCtl1
#define UMCCH1_0_PerfMonCtl1__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl1__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl1__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl1__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl1__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl1__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl1__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl1__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl1__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl1__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl1__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl1__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl1__BankSel_MASK
#define UMCCH1_0_PerfMonCtl1__VCSel_MASK
#define UMCCH1_0_PerfMonCtl1__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl1__Enable_MASK
//UMCCH1_0_PerfMonCtr1_Lo
#define UMCCH1_0_PerfMonCtr1_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr1_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr1_Hi
#define UMCCH1_0_PerfMonCtr1_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr1_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr1_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr1_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr1_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr1_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr1_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr1_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl2
#define UMCCH1_0_PerfMonCtl2__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl2__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl2__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl2__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl2__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl2__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl2__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl2__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl2__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl2__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl2__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl2__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl2__BankSel_MASK
#define UMCCH1_0_PerfMonCtl2__VCSel_MASK
#define UMCCH1_0_PerfMonCtl2__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl2__Enable_MASK
//UMCCH1_0_PerfMonCtr2_Lo
#define UMCCH1_0_PerfMonCtr2_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr2_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr2_Hi
#define UMCCH1_0_PerfMonCtr2_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr2_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr2_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr2_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr2_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr2_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr2_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr2_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl3
#define UMCCH1_0_PerfMonCtl3__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl3__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl3__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl3__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl3__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl3__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl3__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl3__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl3__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl3__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl3__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl3__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl3__BankSel_MASK
#define UMCCH1_0_PerfMonCtl3__VCSel_MASK
#define UMCCH1_0_PerfMonCtl3__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl3__Enable_MASK
//UMCCH1_0_PerfMonCtr3_Lo
#define UMCCH1_0_PerfMonCtr3_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr3_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr3_Hi
#define UMCCH1_0_PerfMonCtr3_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr3_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr3_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr3_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr3_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr3_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr3_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr3_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl4
#define UMCCH1_0_PerfMonCtl4__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl4__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl4__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl4__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl4__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl4__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl4__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl4__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl4__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl4__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl4__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl4__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl4__BankSel_MASK
#define UMCCH1_0_PerfMonCtl4__VCSel_MASK
#define UMCCH1_0_PerfMonCtl4__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl4__Enable_MASK
//UMCCH1_0_PerfMonCtr4_Lo
#define UMCCH1_0_PerfMonCtr4_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr4_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr4_Hi
#define UMCCH1_0_PerfMonCtr4_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr4_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr4_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr4_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr4_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr4_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr4_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr4_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl5
#define UMCCH1_0_PerfMonCtl5__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl5__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl5__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl5__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl5__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl5__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl5__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl5__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl5__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl5__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl5__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl5__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl5__BankSel_MASK
#define UMCCH1_0_PerfMonCtl5__VCSel_MASK
#define UMCCH1_0_PerfMonCtl5__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl5__Enable_MASK
//UMCCH1_0_PerfMonCtr5_Lo
#define UMCCH1_0_PerfMonCtr5_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr5_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr5_Hi
#define UMCCH1_0_PerfMonCtr5_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr5_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr5_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr5_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr5_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr5_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr5_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr5_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl6
#define UMCCH1_0_PerfMonCtl6__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl6__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl6__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl6__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl6__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl6__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl6__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl6__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl6__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl6__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl6__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl6__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl6__BankSel_MASK
#define UMCCH1_0_PerfMonCtl6__VCSel_MASK
#define UMCCH1_0_PerfMonCtl6__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl6__Enable_MASK
//UMCCH1_0_PerfMonCtr6_Lo
#define UMCCH1_0_PerfMonCtr6_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr6_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr6_Hi
#define UMCCH1_0_PerfMonCtr6_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr6_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr6_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr6_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr6_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr6_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr6_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr6_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl7
#define UMCCH1_0_PerfMonCtl7__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl7__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl7__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl7__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl7__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl7__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl7__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl7__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl7__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl7__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl7__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl7__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl7__BankSel_MASK
#define UMCCH1_0_PerfMonCtl7__VCSel_MASK
#define UMCCH1_0_PerfMonCtl7__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl7__Enable_MASK
//UMCCH1_0_PerfMonCtr7_Lo
#define UMCCH1_0_PerfMonCtr7_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr7_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr7_Hi
#define UMCCH1_0_PerfMonCtr7_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr7_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr7_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr7_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr7_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr7_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr7_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr7_Hi__ThreshCnt_MASK
//UMCCH1_0_PerfMonCtl8
#define UMCCH1_0_PerfMonCtl8__EventSelect__SHIFT
#define UMCCH1_0_PerfMonCtl8__RdWrMask__SHIFT
#define UMCCH1_0_PerfMonCtl8__PriorityMask__SHIFT
#define UMCCH1_0_PerfMonCtl8__ReqSizeMask__SHIFT
#define UMCCH1_0_PerfMonCtl8__BankSel__SHIFT
#define UMCCH1_0_PerfMonCtl8__VCSel__SHIFT
#define UMCCH1_0_PerfMonCtl8__SubChanMask__SHIFT
#define UMCCH1_0_PerfMonCtl8__Enable__SHIFT
#define UMCCH1_0_PerfMonCtl8__EventSelect_MASK
#define UMCCH1_0_PerfMonCtl8__RdWrMask_MASK
#define UMCCH1_0_PerfMonCtl8__PriorityMask_MASK
#define UMCCH1_0_PerfMonCtl8__ReqSizeMask_MASK
#define UMCCH1_0_PerfMonCtl8__BankSel_MASK
#define UMCCH1_0_PerfMonCtl8__VCSel_MASK
#define UMCCH1_0_PerfMonCtl8__SubChanMask_MASK
#define UMCCH1_0_PerfMonCtl8__Enable_MASK
//UMCCH1_0_PerfMonCtr8_Lo
#define UMCCH1_0_PerfMonCtr8_Lo__Data__SHIFT
#define UMCCH1_0_PerfMonCtr8_Lo__Data_MASK
//UMCCH1_0_PerfMonCtr8_Hi
#define UMCCH1_0_PerfMonCtr8_Hi__Data__SHIFT
#define UMCCH1_0_PerfMonCtr8_Hi__Overflow__SHIFT
#define UMCCH1_0_PerfMonCtr8_Hi__ThreshCntEn__SHIFT
#define UMCCH1_0_PerfMonCtr8_Hi__ThreshCnt__SHIFT
#define UMCCH1_0_PerfMonCtr8_Hi__Data_MASK
#define UMCCH1_0_PerfMonCtr8_Hi__Overflow_MASK
#define UMCCH1_0_PerfMonCtr8_Hi__ThreshCntEn_MASK
#define UMCCH1_0_PerfMonCtr8_Hi__ThreshCnt_MASK


// addressBlock: umc_w_phy_umc0_umcch2_umcchdec
//UMCCH2_0_BaseAddrCS0
#define UMCCH2_0_BaseAddrCS0__CSEnable__SHIFT
#define UMCCH2_0_BaseAddrCS0__BaseAddr__SHIFT
#define UMCCH2_0_BaseAddrCS0__CSEnable_MASK
#define UMCCH2_0_BaseAddrCS0__BaseAddr_MASK
//UMCCH2_0_AddrMaskCS01
#define UMCCH2_0_AddrMaskCS01__AddrMask__SHIFT
#define UMCCH2_0_AddrMaskCS01__AddrMask_MASK
//UMCCH2_0_AddrSelCS01
#define UMCCH2_0_AddrSelCS01__BankBit0__SHIFT
#define UMCCH2_0_AddrSelCS01__BankBit1__SHIFT
#define UMCCH2_0_AddrSelCS01__BankBit2__SHIFT
#define UMCCH2_0_AddrSelCS01__BankBit3__SHIFT
#define UMCCH2_0_AddrSelCS01__BankBit4__SHIFT
#define UMCCH2_0_AddrSelCS01__RowLo__SHIFT
#define UMCCH2_0_AddrSelCS01__RowHi__SHIFT
#define UMCCH2_0_AddrSelCS01__BankBit0_MASK
#define UMCCH2_0_AddrSelCS01__BankBit1_MASK
#define UMCCH2_0_AddrSelCS01__BankBit2_MASK
#define UMCCH2_0_AddrSelCS01__BankBit3_MASK
#define UMCCH2_0_AddrSelCS01__BankBit4_MASK
#define UMCCH2_0_AddrSelCS01__RowLo_MASK
#define UMCCH2_0_AddrSelCS01__RowHi_MASK
//UMCCH2_0_AddrHashBank0
#define UMCCH2_0_AddrHashBank0__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank0__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank0__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank0__XorEnable_MASK
#define UMCCH2_0_AddrHashBank0__ColXor_MASK
#define UMCCH2_0_AddrHashBank0__RowXor_MASK
//UMCCH2_0_AddrHashBank1
#define UMCCH2_0_AddrHashBank1__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank1__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank1__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank1__XorEnable_MASK
#define UMCCH2_0_AddrHashBank1__ColXor_MASK
#define UMCCH2_0_AddrHashBank1__RowXor_MASK
//UMCCH2_0_AddrHashBank2
#define UMCCH2_0_AddrHashBank2__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank2__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank2__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank2__XorEnable_MASK
#define UMCCH2_0_AddrHashBank2__ColXor_MASK
#define UMCCH2_0_AddrHashBank2__RowXor_MASK
//UMCCH2_0_AddrHashBank3
#define UMCCH2_0_AddrHashBank3__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank3__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank3__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank3__XorEnable_MASK
#define UMCCH2_0_AddrHashBank3__ColXor_MASK
#define UMCCH2_0_AddrHashBank3__RowXor_MASK
//UMCCH2_0_AddrHashBank4
#define UMCCH2_0_AddrHashBank4__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank4__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank4__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank4__XorEnable_MASK
#define UMCCH2_0_AddrHashBank4__ColXor_MASK
#define UMCCH2_0_AddrHashBank4__RowXor_MASK
//UMCCH2_0_AddrHashBank5
#define UMCCH2_0_AddrHashBank5__XorEnable__SHIFT
#define UMCCH2_0_AddrHashBank5__ColXor__SHIFT
#define UMCCH2_0_AddrHashBank5__RowXor__SHIFT
#define UMCCH2_0_AddrHashBank5__XorEnable_MASK
#define UMCCH2_0_AddrHashBank5__ColXor_MASK
#define UMCCH2_0_AddrHashBank5__RowXor_MASK
//UMCCH2_0_UMC_CONFIG
#define UMCCH2_0_UMC_CONFIG__DDR_TYPE__SHIFT
#define UMCCH2_0_UMC_CONFIG__BurstLength__SHIFT
#define UMCCH2_0_UMC_CONFIG__BurstCtrl__SHIFT
#define UMCCH2_0_UMC_CONFIG__DramReady__SHIFT
#define UMCCH2_0_UMC_CONFIG__DDR_TYPE_MASK
#define UMCCH2_0_UMC_CONFIG__BurstLength_MASK
#define UMCCH2_0_UMC_CONFIG__BurstCtrl_MASK
#define UMCCH2_0_UMC_CONFIG__DramReady_MASK
//UMCCH2_0_EccCtrl
#define UMCCH2_0_EccCtrl__WrEccEn__SHIFT
#define UMCCH2_0_EccCtrl__EccReplayEn__SHIFT
#define UMCCH2_0_EccCtrl__UCFatalEn__SHIFT
#define UMCCH2_0_EccCtrl__RdEccEn__SHIFT
#define UMCCH2_0_EccCtrl__PoisonFatalDis__SHIFT
#define UMCCH2_0_EccCtrl__PoisonInhibit__SHIFT
#define UMCCH2_0_EccCtrl__WrEccEn_MASK
#define UMCCH2_0_EccCtrl__EccReplayEn_MASK
#define UMCCH2_0_EccCtrl__UCFatalEn_MASK
#define UMCCH2_0_EccCtrl__RdEccEn_MASK
#define UMCCH2_0_EccCtrl__PoisonFatalDis_MASK
#define UMCCH2_0_EccCtrl__PoisonInhibit_MASK
//UMCCH2_0_UmcLocalCap
#define UMCCH2_0_UmcLocalCap__EccDis__SHIFT
#define UMCCH2_0_UmcLocalCap__Spare__SHIFT
#define UMCCH2_0_UmcLocalCap__WrDis__SHIFT
#define UMCCH2_0_UmcLocalCap__EccDis_MASK
#define UMCCH2_0_UmcLocalCap__Spare_MASK
#define UMCCH2_0_UmcLocalCap__WrDis_MASK
//UMCCH2_0_EccErrCntSel
#define UMCCH2_0_EccErrCntSel__EccErrCntCsSel__SHIFT
#define UMCCH2_0_EccErrCntSel__EccErrInt__SHIFT
#define UMCCH2_0_EccErrCntSel__EccErrCntEn__SHIFT
#define UMCCH2_0_EccErrCntSel__EccErrCntCsSel_MASK
#define UMCCH2_0_EccErrCntSel__EccErrInt_MASK
#define UMCCH2_0_EccErrCntSel__EccErrCntEn_MASK
//UMCCH2_0_EccErrCnt
#define UMCCH2_0_EccErrCnt__EccErrCnt__SHIFT
#define UMCCH2_0_EccErrCnt__EccErrCnt_MASK
//UMCCH2_0_PerfMonCtlClk
#define UMCCH2_0_PerfMonCtlClk__GlblResetMsk__SHIFT
#define UMCCH2_0_PerfMonCtlClk__ClkGate__SHIFT
#define UMCCH2_0_PerfMonCtlClk__GlblReset__SHIFT
#define UMCCH2_0_PerfMonCtlClk__GlblMonEn__SHIFT
#define UMCCH2_0_PerfMonCtlClk__NumCounters__SHIFT
#define UMCCH2_0_PerfMonCtlClk__CtrClkEn__SHIFT
#define UMCCH2_0_PerfMonCtlClk__GlblResetMsk_MASK
#define UMCCH2_0_PerfMonCtlClk__ClkGate_MASK
#define UMCCH2_0_PerfMonCtlClk__GlblReset_MASK
#define UMCCH2_0_PerfMonCtlClk__GlblMonEn_MASK
#define UMCCH2_0_PerfMonCtlClk__NumCounters_MASK
#define UMCCH2_0_PerfMonCtlClk__CtrClkEn_MASK
//UMCCH2_0_PerfMonCtrClk_Lo
#define UMCCH2_0_PerfMonCtrClk_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtrClk_Lo__Data_MASK
//UMCCH2_0_PerfMonCtrClk_Hi
#define UMCCH2_0_PerfMonCtrClk_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtrClk_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtrClk_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtrClk_Hi__Overflow_MASK
//UMCCH2_0_PerfMonCtl1
#define UMCCH2_0_PerfMonCtl1__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl1__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl1__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl1__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl1__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl1__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl1__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl1__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl1__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl1__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl1__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl1__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl1__BankSel_MASK
#define UMCCH2_0_PerfMonCtl1__VCSel_MASK
#define UMCCH2_0_PerfMonCtl1__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl1__Enable_MASK
//UMCCH2_0_PerfMonCtr1_Lo
#define UMCCH2_0_PerfMonCtr1_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr1_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr1_Hi
#define UMCCH2_0_PerfMonCtr1_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr1_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr1_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr1_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr1_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr1_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr1_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr1_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl2
#define UMCCH2_0_PerfMonCtl2__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl2__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl2__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl2__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl2__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl2__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl2__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl2__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl2__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl2__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl2__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl2__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl2__BankSel_MASK
#define UMCCH2_0_PerfMonCtl2__VCSel_MASK
#define UMCCH2_0_PerfMonCtl2__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl2__Enable_MASK
//UMCCH2_0_PerfMonCtr2_Lo
#define UMCCH2_0_PerfMonCtr2_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr2_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr2_Hi
#define UMCCH2_0_PerfMonCtr2_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr2_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr2_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr2_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr2_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr2_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr2_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr2_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl3
#define UMCCH2_0_PerfMonCtl3__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl3__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl3__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl3__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl3__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl3__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl3__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl3__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl3__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl3__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl3__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl3__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl3__BankSel_MASK
#define UMCCH2_0_PerfMonCtl3__VCSel_MASK
#define UMCCH2_0_PerfMonCtl3__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl3__Enable_MASK
//UMCCH2_0_PerfMonCtr3_Lo
#define UMCCH2_0_PerfMonCtr3_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr3_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr3_Hi
#define UMCCH2_0_PerfMonCtr3_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr3_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr3_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr3_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr3_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr3_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr3_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr3_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl4
#define UMCCH2_0_PerfMonCtl4__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl4__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl4__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl4__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl4__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl4__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl4__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl4__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl4__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl4__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl4__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl4__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl4__BankSel_MASK
#define UMCCH2_0_PerfMonCtl4__VCSel_MASK
#define UMCCH2_0_PerfMonCtl4__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl4__Enable_MASK
//UMCCH2_0_PerfMonCtr4_Lo
#define UMCCH2_0_PerfMonCtr4_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr4_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr4_Hi
#define UMCCH2_0_PerfMonCtr4_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr4_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr4_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr4_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr4_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr4_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr4_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr4_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl5
#define UMCCH2_0_PerfMonCtl5__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl5__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl5__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl5__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl5__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl5__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl5__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl5__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl5__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl5__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl5__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl5__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl5__BankSel_MASK
#define UMCCH2_0_PerfMonCtl5__VCSel_MASK
#define UMCCH2_0_PerfMonCtl5__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl5__Enable_MASK
//UMCCH2_0_PerfMonCtr5_Lo
#define UMCCH2_0_PerfMonCtr5_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr5_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr5_Hi
#define UMCCH2_0_PerfMonCtr5_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr5_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr5_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr5_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr5_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr5_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr5_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr5_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl6
#define UMCCH2_0_PerfMonCtl6__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl6__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl6__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl6__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl6__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl6__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl6__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl6__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl6__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl6__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl6__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl6__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl6__BankSel_MASK
#define UMCCH2_0_PerfMonCtl6__VCSel_MASK
#define UMCCH2_0_PerfMonCtl6__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl6__Enable_MASK
//UMCCH2_0_PerfMonCtr6_Lo
#define UMCCH2_0_PerfMonCtr6_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr6_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr6_Hi
#define UMCCH2_0_PerfMonCtr6_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr6_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr6_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr6_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr6_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr6_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr6_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr6_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl7
#define UMCCH2_0_PerfMonCtl7__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl7__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl7__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl7__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl7__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl7__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl7__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl7__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl7__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl7__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl7__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl7__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl7__BankSel_MASK
#define UMCCH2_0_PerfMonCtl7__VCSel_MASK
#define UMCCH2_0_PerfMonCtl7__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl7__Enable_MASK
//UMCCH2_0_PerfMonCtr7_Lo
#define UMCCH2_0_PerfMonCtr7_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr7_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr7_Hi
#define UMCCH2_0_PerfMonCtr7_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr7_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr7_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr7_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr7_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr7_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr7_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr7_Hi__ThreshCnt_MASK
//UMCCH2_0_PerfMonCtl8
#define UMCCH2_0_PerfMonCtl8__EventSelect__SHIFT
#define UMCCH2_0_PerfMonCtl8__RdWrMask__SHIFT
#define UMCCH2_0_PerfMonCtl8__PriorityMask__SHIFT
#define UMCCH2_0_PerfMonCtl8__ReqSizeMask__SHIFT
#define UMCCH2_0_PerfMonCtl8__BankSel__SHIFT
#define UMCCH2_0_PerfMonCtl8__VCSel__SHIFT
#define UMCCH2_0_PerfMonCtl8__SubChanMask__SHIFT
#define UMCCH2_0_PerfMonCtl8__Enable__SHIFT
#define UMCCH2_0_PerfMonCtl8__EventSelect_MASK
#define UMCCH2_0_PerfMonCtl8__RdWrMask_MASK
#define UMCCH2_0_PerfMonCtl8__PriorityMask_MASK
#define UMCCH2_0_PerfMonCtl8__ReqSizeMask_MASK
#define UMCCH2_0_PerfMonCtl8__BankSel_MASK
#define UMCCH2_0_PerfMonCtl8__VCSel_MASK
#define UMCCH2_0_PerfMonCtl8__SubChanMask_MASK
#define UMCCH2_0_PerfMonCtl8__Enable_MASK
//UMCCH2_0_PerfMonCtr8_Lo
#define UMCCH2_0_PerfMonCtr8_Lo__Data__SHIFT
#define UMCCH2_0_PerfMonCtr8_Lo__Data_MASK
//UMCCH2_0_PerfMonCtr8_Hi
#define UMCCH2_0_PerfMonCtr8_Hi__Data__SHIFT
#define UMCCH2_0_PerfMonCtr8_Hi__Overflow__SHIFT
#define UMCCH2_0_PerfMonCtr8_Hi__ThreshCntEn__SHIFT
#define UMCCH2_0_PerfMonCtr8_Hi__ThreshCnt__SHIFT
#define UMCCH2_0_PerfMonCtr8_Hi__Data_MASK
#define UMCCH2_0_PerfMonCtr8_Hi__Overflow_MASK
#define UMCCH2_0_PerfMonCtr8_Hi__ThreshCntEn_MASK
#define UMCCH2_0_PerfMonCtr8_Hi__ThreshCnt_MASK


// addressBlock: umc_w_phy_umc0_umcch3_umcchdec
//UMCCH3_0_BaseAddrCS0
#define UMCCH3_0_BaseAddrCS0__CSEnable__SHIFT
#define UMCCH3_0_BaseAddrCS0__BaseAddr__SHIFT
#define UMCCH3_0_BaseAddrCS0__CSEnable_MASK