linux/arch/x86/include/asm/numachip/numachip_csr.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Numascale NumaConnect-Specific Header file
 *
 * Copyright (C) 2011 Numascale AS. All rights reserved.
 *
 * Send feedback to <[email protected]>
 *
 */

#ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
#define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H

#include <linux/smp.h>
#include <linux/io.h>

#define CSR_NODE_SHIFT
#define CSR_NODE_BITS(p)
#define CSR_NODE_MASK

/* 32K CSR space, b15 indicates geo/non-geo */
#define CSR_OFFSET_MASK
#define CSR_G0_NODE_IDS
#define CSR_G3_EXT_IRQ_GEN

/*
 * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however
 * when using the direct mapping on x86_64, both start and size needs to be
 * aligned with PMD_SIZE which is 2M
 */
#define NUMACHIP_LCSR_BASE
#define NUMACHIP_LCSR_LIM
#define NUMACHIP_LCSR_SIZE
#define NUMACHIP_LAPIC_BITS

static inline void *lcsr_address(unsigned long offset)
{}

static inline unsigned int read_lcsr(unsigned long offset)
{}

static inline void write_lcsr(unsigned long offset, unsigned int val)
{}

/*
 * On NumaChip2, local CSR space is 16MB and starts at fixed offset below 4G
 */

#define NUMACHIP2_LCSR_BASE
#define NUMACHIP2_LCSR_SIZE
#define NUMACHIP2_APIC_ICR
#define NUMACHIP2_TIMER_DEADLINE
#define NUMACHIP2_TIMER_INT
#define NUMACHIP2_TIMER_NOW
#define NUMACHIP2_TIMER_RESET

static inline void __iomem *numachip2_lcsr_address(unsigned long offset)
{}

static inline u32 numachip2_read32_lcsr(unsigned long offset)
{}

static inline u64 numachip2_read64_lcsr(unsigned long offset)
{}

static inline void numachip2_write32_lcsr(unsigned long offset, u32 val)
{}

static inline void numachip2_write64_lcsr(unsigned long offset, u64 val)
{}

static inline unsigned int numachip2_timer(void)
{}

#endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */