linux/drivers/cpufreq/ti-cpufreq.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * TI CPUFreq/OPP hw-supported driver
 *
 * Copyright (C) 2016-2017 Texas Instruments, Inc.
 *	 Dave Gerlach <[email protected]>
 */

#include <linux/cpu.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_opp.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/sys_soc.h>

#define REVISION_MASK
#define REVISION_SHIFT

#define AM33XX_800M_ARM_MPU_MAX_FREQ
#define AM43XX_600M_ARM_MPU_MAX_FREQ

#define DRA7_EFUSE_HAS_OD_MPU_OPP
#define DRA7_EFUSE_HAS_HIGH_MPU_OPP
#define DRA76_EFUSE_HAS_PLUS_MPU_OPP
#define DRA7_EFUSE_HAS_ALL_MPU_OPP
#define DRA76_EFUSE_HAS_ALL_MPU_OPP

#define DRA7_EFUSE_NOM_MPU_OPP
#define DRA7_EFUSE_OD_MPU_OPP
#define DRA7_EFUSE_HIGH_MPU_OPP
#define DRA76_EFUSE_PLUS_MPU_OPP

#define OMAP3_CONTROL_DEVICE_STATUS
#define OMAP3_CONTROL_IDCODE
#define OMAP34xx_ProdID_SKUID
#define OMAP3_SYSCON_BASE

#define AM625_EFUSE_K_MPU_OPP
#define AM625_EFUSE_S_MPU_OPP
#define AM625_EFUSE_T_MPU_OPP

#define AM625_SUPPORT_K_MPU_OPP
#define AM625_SUPPORT_S_MPU_OPP
#define AM625_SUPPORT_T_MPU_OPP

enum {};

#define AM62A7_SUPPORT_N_MPU_OPP
#define AM62A7_SUPPORT_R_MPU_OPP
#define AM62A7_SUPPORT_V_MPU_OPP

#define AM62P5_EFUSE_O_MPU_OPP
#define AM62P5_EFUSE_S_MPU_OPP
#define AM62P5_EFUSE_U_MPU_OPP

#define AM62P5_SUPPORT_O_MPU_OPP
#define AM62P5_SUPPORT_U_MPU_OPP

#define VERSION_COUNT

struct ti_cpufreq_data;

struct ti_cpufreq_soc_data {};

struct ti_cpufreq_data {};

static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
				      unsigned long efuse)
{}

static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
				      unsigned long efuse)
{}

static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data,
				      unsigned long efuse)
{}

static unsigned long am62p5_efuse_xlate(struct ti_cpufreq_data *opp_data,
					unsigned long efuse)
{}

static unsigned long am62a7_efuse_xlate(struct ti_cpufreq_data *opp_data,
					unsigned long efuse)
{}

static unsigned long am625_efuse_xlate(struct ti_cpufreq_data *opp_data,
				       unsigned long efuse)
{}

static struct ti_cpufreq_soc_data am3x_soc_data =;

static struct ti_cpufreq_soc_data am4x_soc_data =;

static struct ti_cpufreq_soc_data dra7_soc_data =;

/*
 * OMAP35x TRM (SPRUF98K):
 *  CONTROL_IDCODE (0x4830 A204) describes Silicon revisions.
 *  Control OMAP Status Register 15:0 (Address 0x4800 244C)
 *    to separate between omap3503, omap3515, omap3525, omap3530
 *    and feature presence.
 *    There are encodings for versions limited to 400/266MHz
 *    but we ignore.
 *    Not clear if this also holds for omap34xx.
 *  some eFuse values e.g. CONTROL_FUSE_OPP1_VDD1
 *    are stored in the SYSCON register range
 *  Register 0x4830A20C [ProdID.SKUID] [0:3]
 *    0x0 for normal 600/430MHz device.
 *    0x8 for 720/520MHz device.
 *    Not clear what omap34xx value is.
 */

static struct ti_cpufreq_soc_data omap34xx_soc_data =;

/*
 * AM/DM37x TRM (SPRUGN4M)
 *  CONTROL_IDCODE (0x4830 A204) describes Silicon revisions.
 *  Control Device Status Register 15:0 (Address 0x4800 244C)
 *    to separate between am3703, am3715, dm3725, dm3730
 *    and feature presence.
 *   Speed Binned = Bit 9
 *     0 800/600 MHz
 *     1 1000/800 MHz
 *  some eFuse values e.g. CONTROL_FUSE_OPP 1G_VDD1
 *    are stored in the SYSCON register range.
 *  There is no 0x4830A20C [ProdID.SKUID] register (exists but
 *    seems to always read as 0).
 */

static const char * const omap3_reg_names[] =;

static struct ti_cpufreq_soc_data omap36xx_soc_data =;

/*
 * AM3517 is quite similar to AM/DM37x except that it has no
 * high speed grade eFuse and no abb ldo
 */

static struct ti_cpufreq_soc_data am3517_soc_data =;

static const struct soc_device_attribute k3_cpufreq_soc[] =;

static struct ti_cpufreq_soc_data am625_soc_data =;

static struct ti_cpufreq_soc_data am62a7_soc_data =;

static struct ti_cpufreq_soc_data am62p5_soc_data =;

/**
 * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
 * @opp_data: pointer to ti_cpufreq_data context
 * @efuse_value: Set to the value parsed from efuse
 *
 * Returns error code if efuse not read properly.
 */
static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
				u32 *efuse_value)
{}

/**
 * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
 * @opp_data: pointer to ti_cpufreq_data context
 * @revision_value: Set to the value parsed from revision register
 *
 * Returns error code if revision not read properly.
 */
static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
			      u32 *revision_value)
{}

static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_data)
{}

static const struct of_device_id ti_cpufreq_of_match[]  __maybe_unused =;

static const struct of_device_id *ti_cpufreq_match_node(void)
{}

static int ti_cpufreq_probe(struct platform_device *pdev)
{}

static int __init ti_cpufreq_init(void)
{}
module_init();

static struct platform_driver ti_cpufreq_driver =;
builtin_platform_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();