linux/drivers/cpufreq/mediatek-cpufreq.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2015 Linaro Ltd.
 * Author: Pi-Cheng Chen <[email protected]>
 */

#include <linux/clk.h>
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/cpumask.h>
#include <linux/minmax.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_opp.h>
#include <linux/regulator/consumer.h>

struct mtk_cpufreq_platform_data { … };

/*
 * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
 * Mediatek SoCs has two voltage inputs, Vproc and Vsram. In some cases the two
 * voltage inputs need to be controlled under a hardware limitation:
 * 100mV < Vsram - Vproc < 200mV
 *
 * When scaling the clock frequency of a CPU clock domain, the clock source
 * needs to be switched to another stable PLL clock temporarily until
 * the original PLL becomes stable at target frequency.
 */
struct mtk_cpu_dvfs_info { … };

static struct platform_device *cpufreq_pdev;

static LIST_HEAD(dvfs_info_list);

static struct mtk_cpu_dvfs_info *mtk_cpu_dvfs_info_lookup(int cpu)
{ … }

static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
					int new_vproc)
{ … }

static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info *info, int vproc)
{ … }

static bool is_ccifreq_ready(struct mtk_cpu_dvfs_info *info)
{ … }

static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
				  unsigned int index)
{ … }

static int mtk_cpufreq_opp_notifier(struct notifier_block *nb,
				    unsigned long event, void *data)
{ … }

static struct device *of_get_cci(struct device *cpu_dev)
{ … }

static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
{ … }

static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
{ … }

static int mtk_cpufreq_init(struct cpufreq_policy *policy)
{ … }

static void mtk_cpufreq_exit(struct cpufreq_policy *policy)
{ … }

static struct cpufreq_driver mtk_cpufreq_driver = …;

static int mtk_cpufreq_probe(struct platform_device *pdev)
{ … }

static struct platform_driver mtk_cpufreq_platdrv = …;

static const struct mtk_cpufreq_platform_data mt2701_platform_data = …;

static const struct mtk_cpufreq_platform_data mt7622_platform_data = …;

static const struct mtk_cpufreq_platform_data mt7623_platform_data = …;

static const struct mtk_cpufreq_platform_data mt7988_platform_data = …;

static const struct mtk_cpufreq_platform_data mt8183_platform_data = …;

static const struct mtk_cpufreq_platform_data mt8186_platform_data = …;

static const struct mtk_cpufreq_platform_data mt8516_platform_data = …;

/* List of machines supported by this driver */
static const struct of_device_id mtk_cpufreq_machines[] __initconst __maybe_unused = …;
MODULE_DEVICE_TABLE(of, mtk_cpufreq_machines);

static int __init mtk_cpufreq_driver_init(void)
{ … }
module_init(…) …

static void __exit mtk_cpufreq_driver_exit(void)
{ … }
module_exit(…)

MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;