linux/drivers/gpu/drm/sti/sti_vtg.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Benjamin Gaignard <[email protected]>
 *          Fabien Dessenne <[email protected]>
 *          Vincent Abriou <[email protected]>
 *          for STMicroelectronics.
 */

#include <linux/module.h>
#include <linux/io.h>
#include <linux/notifier.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>

#include <drm/drm_modes.h>
#include <drm/drm_print.h>

#include "sti_drv.h"
#include "sti_vtg.h"

#define VTG_MODE_MASTER

/* registers offset */
#define VTG_MODE
#define VTG_CLKLN
#define VTG_HLFLN
#define VTG_DRST_AUTOC
#define VTG_VID_TFO
#define VTG_VID_TFS
#define VTG_VID_BFO
#define VTG_VID_BFS

#define VTG_HOST_ITS
#define VTG_HOST_ITS_BCLR
#define VTG_HOST_ITM_BCLR
#define VTG_HOST_ITM_BSET

#define VTG_H_HD_1
#define VTG_TOP_V_VD_1
#define VTG_BOT_V_VD_1
#define VTG_TOP_V_HD_1
#define VTG_BOT_V_HD_1

#define VTG_H_HD_2
#define VTG_TOP_V_VD_2
#define VTG_BOT_V_VD_2
#define VTG_TOP_V_HD_2
#define VTG_BOT_V_HD_2

#define VTG_H_HD_3
#define VTG_TOP_V_VD_3
#define VTG_BOT_V_VD_3
#define VTG_TOP_V_HD_3
#define VTG_BOT_V_HD_3

#define VTG_H_HD_4
#define VTG_TOP_V_VD_4
#define VTG_BOT_V_VD_4
#define VTG_TOP_V_HD_4
#define VTG_BOT_V_HD_4

#define VTG_IRQ_BOTTOM
#define VTG_IRQ_TOP
#define VTG_IRQ_MASK

/* Delay introduced by the HDMI in nb of pixel */
#define HDMI_DELAY

/* Delay introduced by the DVO in nb of pixel */
#define DVO_DELAY

/* delay introduced by the Arbitrary Waveform Generator in nb of pixels */
#define AWG_DELAY_HD
#define AWG_DELAY_ED
#define AWG_DELAY_SD

/*
 * STI VTG register offset structure
 *
 *@h_hd:     stores the VTG_H_HD_x     register offset
 *@top_v_vd: stores the VTG_TOP_V_VD_x register offset
 *@bot_v_vd: stores the VTG_BOT_V_VD_x register offset
 *@top_v_hd: stores the VTG_TOP_V_HD_x register offset
 *@bot_v_hd: stores the VTG_BOT_V_HD_x register offset
 */
struct sti_vtg_regs_offs {};

#define VTG_MAX_SYNC_OUTPUT
static const struct sti_vtg_regs_offs vtg_regs_offs[VTG_MAX_SYNC_OUTPUT] =;

/*
 * STI VTG synchronisation parameters structure
 *
 *@hsync: sample number falling and rising edge
 *@vsync_line_top: vertical top field line number falling and rising edge
 *@vsync_line_bot: vertical bottom field line number falling and rising edge
 *@vsync_off_top: vertical top field sample number rising and falling edge
 *@vsync_off_bot: vertical bottom field sample number rising and falling edge
 */
struct sti_vtg_sync_params {};

/*
 * STI VTG structure
 *
 * @regs: register mapping
 * @sync_params: synchronisation parameters used to generate timings
 * @irq: VTG irq
 * @irq_status: store the IRQ status value
 * @notifier_list: notifier callback
 * @crtc: the CRTC for vblank event
 */
struct sti_vtg {};

struct sti_vtg *of_vtg_find(struct device_node *np)
{}

static void vtg_reset(struct sti_vtg *vtg)
{}

static void vtg_set_output_window(void __iomem *regs,
				  const struct drm_display_mode *mode)
{}

static void vtg_set_hsync_vsync_pos(struct sti_vtg_sync_params *sync,
				    int delay,
				    const struct drm_display_mode *mode)
{}

static void vtg_set_mode(struct sti_vtg *vtg,
			 int type,
			 struct sti_vtg_sync_params *sync,
			 const struct drm_display_mode *mode)
{}

static void vtg_enable_irq(struct sti_vtg *vtg)
{}

void sti_vtg_set_config(struct sti_vtg *vtg,
		const struct drm_display_mode *mode)
{}

/**
 * sti_vtg_get_line_number
 *
 * @mode: display mode to be used
 * @y:    line
 *
 * Return the line number according to the display mode taking
 * into account the Sync and Back Porch information.
 * Video frame line numbers start at 1, y starts at 0.
 * In interlaced modes the start line is the field line number of the odd
 * field, but y is still defined as a progressive frame.
 */
u32 sti_vtg_get_line_number(struct drm_display_mode mode, int y)
{}

/**
 * sti_vtg_get_pixel_number
 *
 * @mode: display mode to be used
 * @x:    row
 *
 * Return the pixel number according to the display mode taking
 * into account the Sync and Back Porch information.
 * Pixels are counted from 0.
 */
u32 sti_vtg_get_pixel_number(struct drm_display_mode mode, int x)
{}

int sti_vtg_register_client(struct sti_vtg *vtg, struct notifier_block *nb,
			    struct drm_crtc *crtc)
{}

int sti_vtg_unregister_client(struct sti_vtg *vtg, struct notifier_block *nb)
{}

static irqreturn_t vtg_irq_thread(int irq, void *arg)
{}

static irqreturn_t vtg_irq(int irq, void *arg)
{}

static int vtg_probe(struct platform_device *pdev)
{}

static const struct of_device_id vtg_of_match[] =;
MODULE_DEVICE_TABLE(of, vtg_of_match);

struct platform_driver sti_vtg_driver =;

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();