linux/drivers/gpu/drm/sti/sti_hda.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) STMicroelectronics SA 2014
 * Author: Fabien Dessenne <[email protected]> for STMicroelectronics.
 */

#include <linux/clk.h>
#include <linux/component.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_debugfs.h>
#include <drm/drm_device.h>
#include <drm/drm_file.h>
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>

/* HDformatter registers */
#define HDA_ANA_CFG
#define HDA_ANA_SCALE_CTRL_Y
#define HDA_ANA_SCALE_CTRL_CB
#define HDA_ANA_SCALE_CTRL_CR
#define HDA_ANA_ANC_CTRL
#define HDA_ANA_SRC_Y_CFG
#define HDA_COEFF_Y_PH1_TAP123
#define HDA_COEFF_Y_PH1_TAP456
#define HDA_COEFF_Y_PH2_TAP123
#define HDA_COEFF_Y_PH2_TAP456
#define HDA_COEFF_Y_PH3_TAP123
#define HDA_COEFF_Y_PH3_TAP456
#define HDA_COEFF_Y_PH4_TAP123
#define HDA_COEFF_Y_PH4_TAP456
#define HDA_ANA_SRC_C_CFG
#define HDA_COEFF_C_PH1_TAP123
#define HDA_COEFF_C_PH1_TAP456
#define HDA_COEFF_C_PH2_TAP123
#define HDA_COEFF_C_PH2_TAP456
#define HDA_COEFF_C_PH3_TAP123
#define HDA_COEFF_C_PH3_TAP456
#define HDA_COEFF_C_PH4_TAP123
#define HDA_COEFF_C_PH4_TAP456
#define HDA_SYNC_AWGI

/* HDA_ANA_CFG */
#define CFG_AWG_ASYNC_EN
#define CFG_AWG_ASYNC_HSYNC_MTD
#define CFG_AWG_ASYNC_VSYNC_MTD
#define CFG_AWG_SYNC_DEL
#define CFG_AWG_FLTR_MODE_SHIFT
#define CFG_AWG_FLTR_MODE_MASK
#define CFG_AWG_FLTR_MODE_SD
#define CFG_AWG_FLTR_MODE_ED
#define CFG_AWG_FLTR_MODE_HD
#define CFG_SYNC_ON_PBPR_MASK
#define CFG_PREFILTER_EN_MASK
#define CFG_PBPR_SYNC_OFF_SHIFT
#define CFG_PBPR_SYNC_OFF_MASK
#define CFG_PBPR_SYNC_OFF_VAL

/* Default scaling values */
#define SCALE_CTRL_Y_DFLT
#define SCALE_CTRL_CB_DFLT
#define SCALE_CTRL_CR_DFLT

/* Video DACs control */
#define DAC_CFG_HD_HZUVW_OFF_MASK

/* Upsampler values for the alternative 2X Filter */
#define SAMPLER_COEF_NB
#define HDA_ANA_SRC_Y_CFG_ALT_2X
static u32 coef_y_alt_2x[] =;

#define HDA_ANA_SRC_C_CFG_ALT_2X
static u32 coef_c_alt_2x[] =;

/* Upsampler values for the 4X Filter */
#define HDA_ANA_SRC_Y_CFG_4X
#define HDA_ANA_SRC_C_CFG_4X
static u32 coef_yc_4x[] =;

/* AWG instructions for some video modes */
#define AWG_MAX_INST

/* 720p@50 */
static u32 AWGi_720p_50[] =;

#define NN_720p_50

/* 720p@60 */
static u32 AWGi_720p_60[] =;

#define NN_720p_60

/* 1080p@30 */
static u32 AWGi_1080p_30[] =;

#define NN_1080p_30

/* 1080p@25 */
static u32 AWGi_1080p_25[] =;

#define NN_1080p_25

/* 1080p@24 */
static u32 AWGi_1080p_24[] =;

#define NN_1080p_24

/* 720x480p@60 */
static u32 AWGi_720x480p_60[] =;

#define NN_720x480p_60

/* Video mode category */
enum sti_hda_vid_cat {};

struct sti_hda_video_config {};

/* HD analog supported modes
 * Interlaced modes may be added when supported by the whole display chain
 */
static const struct sti_hda_video_config hda_supported_modes[] =;

/*
 * STI hd analog structure
 *
 * @dev: driver device
 * @drm_dev: pointer to drm device
 * @mode: current display mode selected
 * @regs: HD analog register
 * @video_dacs_ctrl: video DACS control register
 * @enabled: true if HD analog is enabled else false
 */
struct sti_hda {};

struct sti_hda_connector {};

#define to_sti_hda_connector(x)

static u32 hda_read(struct sti_hda *hda, int offset)
{}

static void hda_write(struct sti_hda *hda, u32 val, int offset)
{}

/**
 * hda_get_mode_idx - Search for a video mode in the supported modes table
 *
 * @mode: mode being searched
 * @idx: index of the found mode
 *
 * Return true if mode is found
 */
static bool hda_get_mode_idx(struct drm_display_mode mode, int *idx)
{}

/**
 * hda_enable_hd_dacs - Enable the HD DACS
 *
 * @hda: pointer to HD analog structure
 * @enable: true if HD DACS need to be enabled, else false
 */
static void hda_enable_hd_dacs(struct sti_hda *hda, bool enable)
{}

#define DBGFS_DUMP(reg)

static void hda_dbg_cfg(struct seq_file *s, int val)
{}

static void hda_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
{}

static void hda_dbg_video_dacs_ctrl(struct seq_file *s, void __iomem *reg)
{}

static int hda_dbg_show(struct seq_file *s, void *data)
{}

static struct drm_info_list hda_debugfs_files[] =;

static void hda_debugfs_init(struct sti_hda *hda, struct drm_minor *minor)
{}

/**
 * sti_hda_configure_awg - Configure AWG, writing instructions
 *
 * @hda: pointer to HD analog structure
 * @awg_instr: pointer to AWG instructions table
 * @nb: nb of AWG instructions
 */
static void sti_hda_configure_awg(struct sti_hda *hda, u32 *awg_instr, int nb)
{}

static void sti_hda_disable(struct drm_bridge *bridge)
{}

static void sti_hda_pre_enable(struct drm_bridge *bridge)
{}

static void sti_hda_set_mode(struct drm_bridge *bridge,
			     const struct drm_display_mode *mode,
			     const struct drm_display_mode *adjusted_mode)
{}

static void sti_hda_bridge_nope(struct drm_bridge *bridge)
{}

static const struct drm_bridge_funcs sti_hda_bridge_funcs =;

static int sti_hda_connector_get_modes(struct drm_connector *connector)
{}

#define CLK_TOLERANCE_HZ

static enum drm_mode_status
sti_hda_connector_mode_valid(struct drm_connector *connector,
			     struct drm_display_mode *mode)
{}

static const
struct drm_connector_helper_funcs sti_hda_connector_helper_funcs =;

static int sti_hda_late_register(struct drm_connector *connector)
{}

static const struct drm_connector_funcs sti_hda_connector_funcs =;

static struct drm_encoder *sti_hda_find_encoder(struct drm_device *dev)
{}

static int sti_hda_bind(struct device *dev, struct device *master, void *data)
{}

static void sti_hda_unbind(struct device *dev,
		struct device *master, void *data)
{}

static const struct component_ops sti_hda_ops =;

static int sti_hda_probe(struct platform_device *pdev)
{}

static void sti_hda_remove(struct platform_device *pdev)
{}

static const struct of_device_id hda_of_match[] =;
MODULE_DEVICE_TABLE(of, hda_of_match);

struct platform_driver sti_hda_driver =;

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();