/* * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef _I915_DRM_H_ #define _I915_DRM_H_ #include <linux/types.h> /* For use by IPS driver */ unsigned long i915_read_mch_val(void); bool i915_gpu_raise(void); bool i915_gpu_lower(void); bool i915_gpu_busy(void); bool i915_gpu_turbo_disable(void); /* Exported from arch/x86/kernel/early-quirks.c */ extern struct resource intel_graphics_stolen_res; /* * The Bridge device's PCI config space has information about the * fb aperture size and the amount of pre-reserved memory. * This is all handled in the intel-gtt.ko module. i915.ko only * cares about the vga bit for the vga arbiter. */ #define INTEL_GMCH_CTRL … #define INTEL_GMCH_VGA_DISABLE … #define SNB_GMCH_CTRL … #define SNB_GMCH_GGMS_SHIFT … #define SNB_GMCH_GGMS_MASK … #define SNB_GMCH_GMS_SHIFT … #define SNB_GMCH_GMS_MASK … #define BDW_GMCH_GGMS_SHIFT … #define BDW_GMCH_GGMS_MASK … #define BDW_GMCH_GMS_SHIFT … #define BDW_GMCH_GMS_MASK … #define I830_GMCH_CTRL … #define I830_GMCH_GMS_MASK … #define I830_GMCH_GMS_LOCAL … #define I830_GMCH_GMS_STOLEN_512 … #define I830_GMCH_GMS_STOLEN_1024 … #define I830_GMCH_GMS_STOLEN_8192 … #define I855_GMCH_GMS_MASK … #define I855_GMCH_GMS_STOLEN_0M … #define I855_GMCH_GMS_STOLEN_1M … #define I855_GMCH_GMS_STOLEN_4M … #define I855_GMCH_GMS_STOLEN_8M … #define I855_GMCH_GMS_STOLEN_16M … #define I855_GMCH_GMS_STOLEN_32M … #define I915_GMCH_GMS_STOLEN_48M … #define I915_GMCH_GMS_STOLEN_64M … #define G33_GMCH_GMS_STOLEN_128M … #define G33_GMCH_GMS_STOLEN_256M … #define INTEL_GMCH_GMS_STOLEN_96M … #define INTEL_GMCH_GMS_STOLEN_160M … #define INTEL_GMCH_GMS_STOLEN_224M … #define INTEL_GMCH_GMS_STOLEN_352M … #define I830_DRB3 … #define I85X_DRB3 … #define I865_TOUD … #define I830_ESMRAMC … #define I845_ESMRAMC … #define I85X_ESMRAMC … #define TSEG_ENABLE … #define I830_TSEG_SIZE_512K … #define I830_TSEG_SIZE_1M … #define I845_TSEG_SIZE_MASK … #define I845_TSEG_SIZE_512K … #define I845_TSEG_SIZE_1M … #define INTEL_BSM … #define INTEL_GEN11_BSM_DW0 … #define INTEL_GEN11_BSM_DW1 … #define INTEL_BSM_MASK … #endif /* _I915_DRM_H_ */
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