linux/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2023 Intel Corporation
 */

#ifndef _XE_GPU_COMMANDS_H_
#define _XE_GPU_COMMANDS_H_

#include "regs/xe_reg_defs.h"

#define XY_CTRL_SURF_COPY_BLT
#define SRC_ACCESS_TYPE_SHIFT
#define DST_ACCESS_TYPE_SHIFT
#define CCS_SIZE_MASK
#define XE2_CCS_SIZE_MASK
#define XY_CTRL_SURF_MOCS_MASK
#define XE2_XY_CTRL_SURF_MOCS_INDEX_MASK
#define NUM_CCS_BYTES_PER_BLOCK
#define NUM_BYTES_PER_CCS_BYTE(_xe)

#define XY_FAST_COLOR_BLT_CMD
#define XY_FAST_COLOR_BLT_DEPTH_32
#define XY_FAST_COLOR_BLT_DW
#define XY_FAST_COLOR_BLT_MOCS_MASK
#define XE2_XY_FAST_COLOR_BLT_MOCS_INDEX_MASK
#define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT

#define XY_FAST_COPY_BLT_CMD
#define XY_FAST_COPY_BLT_DEPTH_32
#define XY_FAST_COPY_BLT_D1_SRC_TILE4
#define XY_FAST_COPY_BLT_D1_DST_TILE4
#define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK

#define PVC_MEM_SET_CMD
#define PVC_MEM_SET_CMD_LEN_DW
#define PVC_MEM_SET_MATRIX
#define PVC_MEM_SET_DATA_FIELD
/* Bspec lists field as [6:0], but index alone is from [6:1] */
#define PVC_MEM_SET_MOCS_INDEX_MASK
#define XE2_MEM_SET_MOCS_INDEX_MASK

#define GFX_OP_PIPE_CONTROL(len)

#define PIPE_CONTROL0_HDC_PIPELINE_FLUSH

#define PIPE_CONTROL_COMMAND_CACHE_INVALIDATE
#define PIPE_CONTROL_TILE_CACHE_FLUSH
#define PIPE_CONTROL_AMFS_FLUSH
#define PIPE_CONTROL_GLOBAL_GTT_IVB
#define PIPE_CONTROL_LRI_POST_SYNC
#define PIPE_CONTROL_STORE_DATA_INDEX
#define PIPE_CONTROL_CS_STALL
#define PIPE_CONTROL_GLOBAL_SNAPSHOT_RESET
#define PIPE_CONTROL_TLB_INVALIDATE
#define PIPE_CONTROL_PSD_SYNC
#define PIPE_CONTROL_QW_WRITE
#define PIPE_CONTROL_DEPTH_STALL
#define PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH
#define PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE
#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
#define PIPE_CONTROL_INDIRECT_STATE_DISABLE
#define PIPE_CONTROL_FLUSH_ENABLE
#define PIPE_CONTROL_DC_FLUSH_ENABLE
#define PIPE_CONTROL_VF_CACHE_INVALIDATE
#define PIPE_CONTROL_CONST_CACHE_INVALIDATE
#define PIPE_CONTROL_STATE_CACHE_INVALIDATE
#define PIPE_CONTROL_STALL_AT_SCOREBOARD
#define PIPE_CONTROL_DEPTH_CACHE_FLUSH

#endif