linux/drivers/gpu/drm/amd/display/dc/dml/dcn401/dcn401_fpu.c

// SPDX-License-Identifier: MIT
//
// Copyright 2024 Advanced Micro Devices, Inc.

#include "dcn401_fpu.h"
#include "dcn401/dcn401_resource.h"
// We need this includes for WATERMARKS_* defines
#include "clk_mgr/dcn401/dcn401_smu14_driver_if.h"
#include "link.h"

#define DC_LOGGER_INIT(logger) …

void dcn401_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)
{ … }

/*
 * dcn401_update_bw_bounding_box
 *
 * This would override some dcn4_01 ip_or_soc initial parameters hardcoded from
 * spreadsheet with actual values as per dGPU SKU:
 * - with passed few options from dc->config
 * - with dentist_vco_frequency from Clk Mgr (currently hardcoded, but might
 *   need to get it from PM FW)
 * - with passed latency values (passed in ns units) in dc-> bb override for
 *   debugging purposes
 * - with passed latencies from VBIOS (in 100_ns units) if available for
 *   certain dGPU SKU
 * - with number of DRAM channels from VBIOS (which differ for certain dGPU SKU
 *   of the same ASIC)
 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM
 *   FW for different clocks (which might differ for certain dGPU SKU of the
 *   same ASIC)
 */
void dcn401_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params)
{ … }