linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h

/* Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */
#ifndef __DCN20_DSC_H__
#define __DCN20_DSC_H__

#include "dsc.h"
#include "dsc/dscc_types.h"
#include <drm/display/drm_dsc.h>

#define TO_DCN20_DSC(dsc)

#define DSC_REG_LIST_DCN20(id)


#define DSC_SF(reg_name, field_name, post_fix)

//Used in resolving the corner case with duplicate field name
#define DSC2_SF(reg_name, field_name, post_fix)

#define DSC_REG_LIST_SH_MASK_DCN20(mask_sh)



#define DSC_FIELD_LIST_DCN20(type)


struct dcn20_dsc_registers {};


struct dcn20_dsc_shift {};

struct dcn20_dsc_mask {};

/* DSCCIF_CONFIG.INPUT_PIXEL_FORMAT values */
enum dsc_pixel_format {};

struct dsc_reg_values {};

struct dcn20_dsc {};

void dsc_config_log(struct display_stream_compressor *dsc,
		const struct dsc_config *config);

void dsc_log_pps(struct display_stream_compressor *dsc,
		struct drm_dsc_config *pps);

void dsc_override_rc_params(struct rc_params *rc,
		const struct dc_dsc_rc_params_override *override);

bool dsc_prepare_config(const struct dsc_config *dsc_cfg,
		struct dsc_reg_values *dsc_reg_vals,
		struct dsc_optc_config *dsc_optc_cfg);

enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_pixel_encoding dc_pix_enc,
		bool is_ycbcr422_simple);

enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_color_depth dc_color_depth);

void dsc_init_reg_values(struct dsc_reg_values *reg_vals);

void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params);

void dsc2_construct(struct dcn20_dsc *dsc,
		struct dc_context *ctx,
		int inst,
		const struct dcn20_dsc_registers *dsc_regs,
		const struct dcn20_dsc_shift *dsc_shift,
		const struct dcn20_dsc_mask *dsc_mask);

void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps,
		int pixel_clock_100Hz);

bool dsc2_get_packed_pps(struct display_stream_compressor *dsc,
		const struct dsc_config *dsc_cfg,
		uint8_t *dsc_packed_pps);

void dsc2_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
		struct dsc_optc_config *dsc_optc_cfg);
void dsc2_enable(struct display_stream_compressor *dsc, int opp_pipe);
void dsc2_disable(struct display_stream_compressor *dsc);
void dsc2_disconnect(struct display_stream_compressor *dsc);
void dsc2_wait_disconnect_pending_clear(struct display_stream_compressor *dsc);

#endif