// SPDX-License-Identifier: GPL-2.0+ /* * AD4000 SPI ADC driver * * Copyright 2024 Analog Devices Inc. */ #include <linux/bits.h> #include <linux/bitfield.h> #include <linux/byteorder/generic.h> #include <linux/cleanup.h> #include <linux/device.h> #include <linux/err.h> #include <linux/math.h> #include <linux/module.h> #include <linux/mod_devicetable.h> #include <linux/gpio/consumer.h> #include <linux/regulator/consumer.h> #include <linux/spi/spi.h> #include <linux/units.h> #include <linux/util_macros.h> #include <linux/iio/iio.h> #include <linux/iio/buffer.h> #include <linux/iio/triggered_buffer.h> #include <linux/iio/trigger_consumer.h> #define AD4000_READ_COMMAND … #define AD4000_WRITE_COMMAND … #define AD4000_CONFIG_REG_DEFAULT … /* AD4000 Configuration Register programmable bits */ #define AD4000_CFG_SPAN_COMP … #define AD4000_CFG_HIGHZ … #define AD4000_SCALE_OPTIONS … #define AD4000_TQUIET1_NS … #define AD4000_TQUIET2_NS … #define AD4000_TCONV_NS … #define __AD4000_DIFF_CHANNEL(_sign, _real_bits, _storage_bits, _reg_access) … #define AD4000_DIFF_CHANNEL(_sign, _real_bits, _reg_access) … #define __AD4000_PSEUDO_DIFF_CHANNEL(_sign, _real_bits, _storage_bits, _reg_access) … #define AD4000_PSEUDO_DIFF_CHANNEL(_sign, _real_bits, _reg_access) … static const char * const ad4000_power_supplies[] = …; enum ad4000_sdi { … }; /* maps adi,sdi-pin property value to enum */ static const char * const ad4000_sdi_pin[] = …; /* Gains stored as fractions of 1000 so they can be expressed by integers. */ static const int ad4000_gains[] = …; struct ad4000_chip_info { … }; static const struct ad4000_chip_info ad4000_chip_info = …; static const struct ad4000_chip_info ad4001_chip_info = …; static const struct ad4000_chip_info ad4002_chip_info = …; static const struct ad4000_chip_info ad4003_chip_info = …; static const struct ad4000_chip_info ad4004_chip_info = …; static const struct ad4000_chip_info ad4005_chip_info = …; static const struct ad4000_chip_info ad4006_chip_info = …; static const struct ad4000_chip_info ad4007_chip_info = …; static const struct ad4000_chip_info ad4008_chip_info = …; static const struct ad4000_chip_info ad4010_chip_info = …; static const struct ad4000_chip_info ad4011_chip_info = …; static const struct ad4000_chip_info ad4020_chip_info = …; static const struct ad4000_chip_info ad4021_chip_info = …; static const struct ad4000_chip_info ad4022_chip_info = …; static const struct ad4000_chip_info adaq4001_chip_info = …; static const struct ad4000_chip_info adaq4003_chip_info = …; struct ad4000_state { … }; static void ad4000_fill_scale_tbl(struct ad4000_state *st, struct iio_chan_spec const *chan) { … } static int ad4000_write_reg(struct ad4000_state *st, uint8_t val) { … } static int ad4000_read_reg(struct ad4000_state *st, unsigned int *val) { … } static int ad4000_convert_and_acquire(struct ad4000_state *st) { … } static int ad4000_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val) { … } static int ad4000_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) { … } static int ad4000_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, const int **vals, int *type, int *length, long info) { … } static int ad4000_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask) { … } static int ad4000_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { … } static irqreturn_t ad4000_trigger_handler(int irq, void *p) { … } static const struct iio_info ad4000_reg_access_info = …; static const struct iio_info ad4000_info = …; /* * This executes a data sample transfer for when the device connections are * in "3-wire" mode, selected when the adi,sdi-pin device tree property is * absent or set to "high". In this connection mode, the ADC SDI pin is * connected to MOSI or to VIO and ADC CNV pin is connected either to a SPI * controller CS or to a GPIO. * AD4000 series of devices initiate conversions on the rising edge of CNV pin. * * If the CNV pin is connected to an SPI controller CS line (which is by default * active low), the ADC readings would have a latency (delay) of one read. * Moreover, since we also do ADC sampling for filling the buffer on triggered * buffer mode, the timestamps of buffer readings would be disarranged. * To prevent the read latency and reduce the time discrepancy between the * sample read request and the time of actual sampling by the ADC, do a * preparatory transfer to pulse the CS/CNV line. */ static int ad4000_prepare_3wire_mode_message(struct ad4000_state *st, const struct iio_chan_spec *chan) { … } /* * This executes a data sample transfer for when the device connections are * in "4-wire" mode, selected when the adi,sdi-pin device tree property is * set to "cs". In this connection mode, the controller CS pin is connected to * ADC SDI pin and a GPIO is connected to ADC CNV pin. * The GPIO connected to ADC CNV pin is set outside of the SPI transfer. */ static int ad4000_prepare_4wire_mode_message(struct ad4000_state *st, const struct iio_chan_spec *chan) { … } static int ad4000_config(struct ad4000_state *st) { … } static int ad4000_probe(struct spi_device *spi) { … } static const struct spi_device_id ad4000_id[] = …; MODULE_DEVICE_TABLE(spi, ad4000_id); static const struct of_device_id ad4000_of_match[] = …; MODULE_DEVICE_TABLE(of, ad4000_of_match); static struct spi_driver ad4000_driver = …; module_spi_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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