linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h

/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2024 NVIDIA Corporation & Affiliates */

#ifndef MLX5HWS_POOL_H_
#define MLX5HWS_POOL_H_

#define MLX5HWS_POOL_STC_LOG_SZ …

#define MLX5HWS_POOL_RESOURCE_ARR_SZ …

enum mlx5hws_pool_type { … };

struct mlx5hws_pool_chunk { … };

struct mlx5hws_pool_resource { … };

enum mlx5hws_pool_flags { … };

enum mlx5hws_pool_optimize { … };

struct mlx5hws_pool_attr { … };

enum mlx5hws_db_type { … };

struct mlx5hws_buddy_manager { … };

struct mlx5hws_pool_elements { … };

struct mlx5hws_element_manager { … };

struct mlx5hws_pool_db { … };

mlx5hws_pool_db_get_chunk;
mlx5hws_pool_db_put_chunk;
mlx5hws_pool_unint_db;

struct mlx5hws_pool { … };

struct mlx5hws_pool *
mlx5hws_pool_create(struct mlx5hws_context *ctx,
		    struct mlx5hws_pool_attr *pool_attr);

int mlx5hws_pool_destroy(struct mlx5hws_pool *pool);

int mlx5hws_pool_chunk_alloc(struct mlx5hws_pool *pool,
			     struct mlx5hws_pool_chunk *chunk);

void mlx5hws_pool_chunk_free(struct mlx5hws_pool *pool,
			     struct mlx5hws_pool_chunk *chunk);

static inline u32
mlx5hws_pool_chunk_get_base_id(struct mlx5hws_pool *pool,
			       struct mlx5hws_pool_chunk *chunk)
{ … }

static inline u32
mlx5hws_pool_chunk_get_base_mirror_id(struct mlx5hws_pool *pool,
				      struct mlx5hws_pool_chunk *chunk)
{ … }
#endif /* MLX5HWS_POOL_H_ */