linux/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2014-2019 Intel Corporation
 */

#ifndef _INTEL_GUC_FWIF_H
#define _INTEL_GUC_FWIF_H

#include <linux/bits.h>
#include <linux/compiler.h>
#include <linux/types.h>
#include "gt/intel_engine_types.h"

#include "abi/guc_actions_abi.h"
#include "abi/guc_actions_slpc_abi.h"
#include "abi/guc_errors_abi.h"
#include "abi/guc_communication_mmio_abi.h"
#include "abi/guc_communication_ctb_abi.h"
#include "abi/guc_klvs_abi.h"
#include "abi/guc_messages_abi.h"

/* Payload length only i.e. don't include G2H header length */
#define G2H_LEN_DW_SCHED_CONTEXT_MODE_SET
#define G2H_LEN_DW_DEREGISTER_CONTEXT
#define G2H_LEN_DW_INVALIDATE_TLB

#define GUC_CONTEXT_DISABLE
#define GUC_CONTEXT_ENABLE

#define GUC_CLIENT_PRIORITY_KMD_HIGH
#define GUC_CLIENT_PRIORITY_HIGH
#define GUC_CLIENT_PRIORITY_KMD_NORMAL
#define GUC_CLIENT_PRIORITY_NORMAL
#define GUC_CLIENT_PRIORITY_NUM

#define GUC_MAX_CONTEXT_ID
#define GUC_INVALID_CONTEXT_ID

#define GUC_RENDER_CLASS
#define GUC_VIDEO_CLASS
#define GUC_VIDEOENHANCE_CLASS
#define GUC_BLITTER_CLASS
#define GUC_COMPUTE_CLASS
#define GUC_GSC_OTHER_CLASS
#define GUC_LAST_ENGINE_CLASS
#define GUC_MAX_ENGINE_CLASSES
#define GUC_MAX_INSTANCES_PER_CLASS

#define GUC_DOORBELL_INVALID

/*
 * Work queue item header definitions
 *
 * Work queue is circular buffer used to submit complex (multi-lrc) submissions
 * to the GuC. A work queue item is an entry in the circular buffer.
 */
#define WQ_STATUS_ACTIVE
#define WQ_STATUS_SUSPENDED
#define WQ_STATUS_CMD_ERROR
#define WQ_STATUS_ENGINE_ID_NOT_USED
#define WQ_STATUS_SUSPENDED_FROM_RESET
#define WQ_TYPE_BATCH_BUF
#define WQ_TYPE_PSEUDO
#define WQ_TYPE_INORDER
#define WQ_TYPE_NOOP
#define WQ_TYPE_MULTI_LRC
#define WQ_TYPE_MASK
#define WQ_LEN_MASK

#define WQ_GUC_ID_MASK
#define WQ_RING_TAIL_MASK

#define GUC_STAGE_DESC_ATTR_ACTIVE
#define GUC_STAGE_DESC_ATTR_PENDING_DB
#define GUC_STAGE_DESC_ATTR_KERNEL
#define GUC_STAGE_DESC_ATTR_PREEMPT
#define GUC_STAGE_DESC_ATTR_RESET
#define GUC_STAGE_DESC_ATTR_WQLOCKED
#define GUC_STAGE_DESC_ATTR_PCH
#define GUC_STAGE_DESC_ATTR_TERMINATED

#define GUC_CTL_LOG_PARAMS
#define GUC_LOG_VALID
#define GUC_LOG_NOTIFY_ON_HALF_FULL
#define GUC_LOG_CAPTURE_ALLOC_UNITS
#define GUC_LOG_LOG_ALLOC_UNITS
#define GUC_LOG_CRASH_SHIFT
#define GUC_LOG_CRASH_MASK
#define GUC_LOG_DEBUG_SHIFT
#define GUC_LOG_DEBUG_MASK
#define GUC_LOG_CAPTURE_SHIFT
#define GUC_LOG_CAPTURE_MASK
#define GUC_LOG_BUF_ADDR_SHIFT

#define GUC_CTL_WA
#define GUC_WA_GAM_CREDITS
#define GUC_WA_DUAL_QUEUE
#define GUC_WA_RCS_RESET_BEFORE_RC6
#define GUC_WA_PRE_PARSER
#define GUC_WA_CONTEXT_ISOLATION
#define GUC_WA_RCS_CCS_SWITCHOUT
#define GUC_WA_HOLD_CCS_SWITCHOUT
#define GUC_WA_POLLCS
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST
#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6

#define GUC_CTL_FEATURE
#define GUC_CTL_ENABLE_SLPC
#define GUC_CTL_DISABLE_SCHEDULER

#define GUC_CTL_DEBUG
#define GUC_LOG_VERBOSITY_SHIFT
#define GUC_LOG_VERBOSITY_LOW
#define GUC_LOG_VERBOSITY_MED
#define GUC_LOG_VERBOSITY_HIGH
#define GUC_LOG_VERBOSITY_ULTRA
/* Verbosity range-check limits, without the shift */
#define GUC_LOG_VERBOSITY_MIN
#define GUC_LOG_VERBOSITY_MAX
#define GUC_LOG_VERBOSITY_MASK
#define GUC_LOG_DESTINATION_MASK
#define GUC_LOG_DISABLED
#define GUC_PROFILE_ENABLED

#define GUC_CTL_ADS
#define GUC_ADS_ADDR_SHIFT
#define GUC_ADS_ADDR_MASK

#define GUC_CTL_DEVID

#define GUC_CTL_MAX_DWORDS

/* Generic GT SysInfo data types */
#define GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED
#define GUC_GENERIC_GT_SYSINFO_VDBOX_SFC_SUPPORT_MASK
#define GUC_GENERIC_GT_SYSINFO_DOORBELL_COUNT_PER_SQIDI
#define GUC_GENERIC_GT_SYSINFO_MAX

/*
 * The class goes in bits [0..2] of the GuC ID, the instance in bits [3..6].
 * Bit 7 can be used for operations that apply to all engine classes&instances.
 */
#define GUC_ENGINE_CLASS_SHIFT
#define GUC_ENGINE_CLASS_MASK
#define GUC_ENGINE_INSTANCE_SHIFT
#define GUC_ENGINE_INSTANCE_MASK
#define GUC_ENGINE_ALL_INSTANCES

#define MAKE_GUC_ID(class, instance)

#define GUC_ID_TO_ENGINE_CLASS(guc_id)
#define GUC_ID_TO_ENGINE_INSTANCE(guc_id)

#define SLPC_EVENT(id, c)

/* the GuC arrays don't include OTHER_CLASS */
static u8 engine_class_guc_class_map[] =;

static u8 guc_class_engine_class_map[] =;

static inline u8 engine_class_to_guc_class(u8 class)
{}

static inline u8 guc_class_to_engine_class(u8 guc_class)
{}

/* Work item for submitting workloads into work queue of GuC. */
struct guc_wq_item {} __packed;

struct guc_process_desc_v69 {} __packed;

struct guc_sched_wq_desc {} __packed;

/* Helper for context registration H2G */
struct guc_ctxt_registration_info {};
#define CONTEXT_REGISTRATION_FLAG_KMD

/* Preempt to idle on quantum expiry */
#define CONTEXT_POLICY_FLAG_PREEMPT_TO_IDLE_V69

/*
 * GuC Context registration descriptor.
 * FIXME: This is only required to exist during context registration.
 * The current 1:1 between guc_lrc_desc and LRCs for the lifetime of the LRC
 * is not required.
 */
struct guc_lrc_desc_v69 {} __packed;

/* 32-bit KLV structure as used by policy updates and others */
struct guc_klv_generic_dw_t {} __packed;

/* Format of the UPDATE_CONTEXT_POLICIES H2G data packet */
struct guc_update_context_policy_header {} __packed;

struct guc_update_context_policy {} __packed;

/* Format of the UPDATE_SCHEDULING_POLICIES H2G data packet */
struct guc_update_scheduling_policy_header {} __packed;

/*
 * Can't dynamically allocate memory for the scheduling policy KLV because
 * it will be sent from within the reset path. Need a fixed size lump on
 * the stack instead :(.
 *
 * Currently, there is only one KLV defined, which has 1 word of KL + 2 words of V.
 */
#define MAX_SCHEDULING_POLICY_SIZE

struct guc_update_scheduling_policy {} __packed;

#define GUC_POWER_UNSPECIFIED
#define GUC_POWER_D0
#define GUC_POWER_D1
#define GUC_POWER_D2
#define GUC_POWER_D3

/* Scheduling policy settings */

#define GLOBAL_SCHEDULE_POLICY_RC_YIELD_DURATION
#define GLOBAL_SCHEDULE_POLICY_RC_YIELD_RATIO

#define GLOBAL_POLICY_MAX_NUM_WI

/* Don't reset an engine upon preemption failure */
#define GLOBAL_POLICY_DISABLE_ENGINE_RESET

#define GLOBAL_POLICY_DEFAULT_DPC_PROMOTE_TIME_US

/*
 * GuC converts the timeout to clock ticks internally. Different platforms have
 * different GuC clocks. Thus, the maximum value before overflow is platform
 * dependent. Current worst case scenario is about 110s. So, the spec says to
 * limit to 100s to be safe.
 */
#define GUC_POLICY_MAX_EXEC_QUANTUM_US
#define GUC_POLICY_MAX_PREEMPT_TIMEOUT_US

static inline u32 guc_policy_max_exec_quantum_ms(void)
{}

static inline u32 guc_policy_max_preempt_timeout_ms(void)
{}

struct guc_policies {} __packed;

/* GuC MMIO reg state struct */
struct guc_mmio_reg {} __packed;

/* GuC register sets */
struct guc_mmio_reg_set {} __packed;

/* HW info */
struct guc_gt_system_info {} __packed;

enum {};

/*Register-types of GuC capture register lists */
enum guc_capture_type {};

/* Class indecies for capture_class and capture_instance arrays */
enum {};

/* GuC Additional Data Struct */
struct guc_ads {} __packed;

/* Engine usage stats */
struct guc_engine_usage_record {} __packed;

struct guc_engine_usage {} __packed;

/* GuC logging structures */

enum guc_log_buffer_type {};

/*
 * struct guc_log_buffer_state - GuC log buffer state
 *
 * Below state structure is used for coordination of retrieval of GuC firmware
 * logs. Separate state is maintained for each log buffer type.
 * read_ptr points to the location where i915 read last in log buffer and
 * is read only for GuC firmware. write_ptr is incremented by GuC with number
 * of bytes written for each log entry and is read only for i915.
 * When any type of log buffer becomes half full, GuC sends a flush interrupt.
 * GuC firmware expects that while it is writing to 2nd half of the buffer,
 * first half would get consumed by Host and then get a flush completed
 * acknowledgment from Host, so that it does not end up doing any overwrite
 * causing loss of logs. So when buffer gets half filled & i915 has requested
 * for interrupt, GuC will set flush_to_file field, set the sampled_write_ptr
 * to the value of write_ptr and raise the interrupt.
 * On receiving the interrupt i915 should read the buffer, clear flush_to_file
 * field and also update read_ptr with the value of sample_write_ptr, before
 * sending an acknowledgment to GuC. marker & version fields are for internal
 * usage of GuC and opaque to i915. buffer_full_cnt field is incremented every
 * time GuC detects the log buffer overflow.
 */
struct guc_log_buffer_state {} __packed;

/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
enum intel_guc_recv_message {};

#endif