linux/drivers/gpu/drm/i915/display/intel_wm_types.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2021 Intel Corporation
 */

#ifndef __INTEL_WM_TYPES_H__
#define __INTEL_WM_TYPES_H__

#include <linux/types.h>

#include "intel_display_limits.h"

enum intel_ddb_partitioning {};

struct ilk_wm_values {};

struct g4x_pipe_wm {};

struct g4x_sr_wm {};

struct vlv_wm_ddl_values {};

struct vlv_wm_values {};

struct g4x_wm_values {};

struct skl_ddb_entry {};

static inline u16 skl_ddb_entry_size(const struct skl_ddb_entry *entry)
{}

static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1,
				       const struct skl_ddb_entry *e2)
{}

#endif /* __INTEL_WM_TYPES_H__ */