linux/drivers/gpu/drm/i915/display/intel_display_reg_defs.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2022 Intel Corporation
 */

#ifndef __INTEL_DISPLAY_REG_DEFS_H__
#define __INTEL_DISPLAY_REG_DEFS_H__

#include "i915_reg_defs.h"

#define DISPLAY_MMIO_BASE(dev_priv) …

#define VLV_DISPLAY_BASE …

/*
 * Named helper wrappers around _PICK_EVEN() and _PICK_EVEN_2RANGES().
 */
#define _PIPE(pipe, a, b) …
#define _PLANE(plane, a, b) …
#define _TRANS(tran, a, b) …
#define _PORT(port, a, b) …
#define _PLL(pll, a, b) …
#define _PHY(phy, a, b) …

#define _MMIO_PIPE(pipe, a, b) …
#define _MMIO_PLANE(plane, a, b) …
#define _MMIO_TRANS(tran, a, b) …
#define _MMIO_PORT(port, a, b) …
#define _MMIO_PLL(pll, a, b) …
#define _MMIO_PHY(phy, a, b) …

#define _MMIO_BASE_PIPE3(base, pipe, a, b, c) …
#define _MMIO_BASE_PORT3(base, pipe, a, b, c) …

/*
 * Device info offset array based helpers for groups of registers with unevenly
 * spaced base offsets.
 */
#define _MMIO_PIPE2(display, pipe, reg) …
#define _MMIO_TRANS2(display, tran, reg) …
#define _MMIO_CURSOR2(display, pipe, reg) …

#endif /* __INTEL_DISPLAY_REG_DEFS_H__ */