linux/include/uapi/linux/mii.h

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
 * linux/mii.h: definitions for MII-compatible transceivers
 * Originally drivers/net/sunhme.h.
 *
 * Copyright (C) 1996, 1999, 2001 David S. Miller ([email protected])
 */

#ifndef _UAPI__LINUX_MII_H__
#define _UAPI__LINUX_MII_H__

#include <linux/types.h>
#include <linux/ethtool.h>

/* Generic MII registers. */
#define MII_BMCR
#define MII_BMSR
#define MII_PHYSID1
#define MII_PHYSID2
#define MII_ADVERTISE
#define MII_LPA
#define MII_EXPANSION
#define MII_CTRL1000
#define MII_STAT1000
#define MII_MMD_CTRL
#define MII_MMD_DATA
#define MII_ESTATUS
#define MII_DCOUNTER
#define MII_FCSCOUNTER
#define MII_NWAYTEST
#define MII_RERRCOUNTER
#define MII_SREVISION
#define MII_RESV1
#define MII_LBRERROR
#define MII_PHYADDR
#define MII_RESV2
#define MII_TPISTATUS
#define MII_NCONFIG

/* Basic mode control register. */
#define BMCR_RESV
#define BMCR_SPEED1000
#define BMCR_CTST
#define BMCR_FULLDPLX
#define BMCR_ANRESTART
#define BMCR_ISOLATE
#define BMCR_PDOWN
#define BMCR_ANENABLE
#define BMCR_SPEED100
#define BMCR_LOOPBACK
#define BMCR_RESET
#define BMCR_SPEED10

/* Basic mode status register. */
#define BMSR_ERCAP
#define BMSR_JCD
#define BMSR_LSTATUS
#define BMSR_ANEGCAPABLE
#define BMSR_RFAULT
#define BMSR_ANEGCOMPLETE
#define BMSR_RESV
#define BMSR_ESTATEN
#define BMSR_100HALF2
#define BMSR_100FULL2
#define BMSR_10HALF
#define BMSR_10FULL
#define BMSR_100HALF
#define BMSR_100FULL
#define BMSR_100BASE4

/* Advertisement control register. */
#define ADVERTISE_SLCT
#define ADVERTISE_CSMA
#define ADVERTISE_10HALF
#define ADVERTISE_1000XFULL
#define ADVERTISE_10FULL
#define ADVERTISE_1000XHALF
#define ADVERTISE_100HALF
#define ADVERTISE_1000XPAUSE
#define ADVERTISE_100FULL
#define ADVERTISE_1000XPSE_ASYM
#define ADVERTISE_100BASE4
#define ADVERTISE_PAUSE_CAP
#define ADVERTISE_PAUSE_ASYM
#define ADVERTISE_RESV
#define ADVERTISE_RFAULT
#define ADVERTISE_LPACK
#define ADVERTISE_NPAGE

#define ADVERTISE_FULL
#define ADVERTISE_ALL

/* Link partner ability register. */
#define LPA_SLCT
#define LPA_10HALF
#define LPA_1000XFULL
#define LPA_10FULL
#define LPA_1000XHALF
#define LPA_100HALF
#define LPA_1000XPAUSE
#define LPA_100FULL
#define LPA_1000XPAUSE_ASYM
#define LPA_100BASE4
#define LPA_PAUSE_CAP
#define LPA_PAUSE_ASYM
#define LPA_RESV
#define LPA_RFAULT
#define LPA_LPACK
#define LPA_NPAGE

#define LPA_DUPLEX
#define LPA_100

/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY
#define EXPANSION_LCWP
#define EXPANSION_ENABLENPAGE
#define EXPANSION_NPCAPABLE
#define EXPANSION_MFAULTS
#define EXPANSION_RESV

#define ESTATUS_1000_XFULL
#define ESTATUS_1000_XHALF
#define ESTATUS_1000_TFULL
#define ESTATUS_1000_THALF

/* N-way test register. */
#define NWAYTEST_RESV1
#define NWAYTEST_LOOPBACK
#define NWAYTEST_RESV2

/* MAC and PHY tx_config_Reg[15:0] for SGMII in-band auto-negotiation.*/
#define ADVERTISE_SGMII
#define LPA_SGMII
#define LPA_SGMII_SPD_MASK
#define LPA_SGMII_FULL_DUPLEX
#define LPA_SGMII_DPX_SPD_MASK
#define LPA_SGMII_10
#define LPA_SGMII_10HALF
#define LPA_SGMII_10FULL
#define LPA_SGMII_100
#define LPA_SGMII_100HALF
#define LPA_SGMII_100FULL
#define LPA_SGMII_1000
#define LPA_SGMII_1000HALF
#define LPA_SGMII_1000FULL
#define LPA_SGMII_LINK

/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL
#define ADVERTISE_1000HALF
#define CTL1000_PREFER_MASTER
#define CTL1000_AS_MASTER
#define CTL1000_ENABLE_MASTER

/* 1000BASE-T Status register */
#define LPA_1000MSFAIL
#define LPA_1000MSRES
#define LPA_1000LOCALRXOK
#define LPA_1000REMRXOK
#define LPA_1000FULL
#define LPA_1000HALF

/* Flow control flags */
#define FLOW_CTRL_TX
#define FLOW_CTRL_RX

/* MMD Access Control register fields */
#define MII_MMD_CTRL_DEVAD_MASK
#define MII_MMD_CTRL_ADDR
#define MII_MMD_CTRL_NOINCR
#define MII_MMD_CTRL_INCR_RDWT
#define MII_MMD_CTRL_INCR_ON_WT

/* This structure is used in all SIOCxMIIxxx ioctl calls */
struct mii_ioctl_data {};

#endif /* _UAPI__LINUX_MII_H__ */