linux/drivers/phy/hisilicon/phy-hi3670-usb3.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Phy provider for USB 3.1 controller on HiSilicon Kirin970 platform
 *
 * Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
 *		http://www.huawei.com
 *
 * Authors: Yu Chen <[email protected]>
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#define SCTRL_SCDEEPSLEEPED
#define USB_CLK_SELECTED

#define PERI_CRG_PEREN0
#define PERI_CRG_PERDIS0
#define PERI_CRG_PEREN4
#define PERI_CRG_PERDIS4
#define PERI_CRG_PERRSTEN4
#define PERI_CRG_PERRSTDIS4
#define PERI_CRG_ISODIS
#define PERI_CRG_PEREN6
#define PERI_CRG_PERDIS6

#define USB_REFCLK_ISO_EN

#define GT_CLK_USB2PHY_REF

#define PCTRL_PERI_CTRL3
#define PCTRL_PERI_CTRL3_MSK_START
#define USB_TCXO_EN

#define PCTRL_PERI_CTRL24
#define SC_CLK_USB3PHY_3MUX1_SEL

#define USB3OTG_CTRL0
#define USB3OTG_CTRL3
#define USB3OTG_CTRL4
#define USB3OTG_CTRL5
#define USB3OTG_CTRL7
#define USB_MISC_CFG50
#define USB_MISC_CFG54
#define USB_MISC_CFG58
#define USB_MISC_CFG5C
#define USB_MISC_CFGA0
#define TCA_CLK_RST
#define TCA_INTR_EN
#define TCA_INTR_STS
#define TCA_GCFG
#define TCA_TCPC
#define TCA_SYSMODE_CFG
#define TCA_VBUS_CTRL

#define CTRL0_USB3_VBUSVLD
#define CTRL0_USB3_VBUSVLD_SEL

#define CTRL3_USB2_VBUSVLDEXT0
#define CTRL3_USB2_VBUSVLDEXTSEL0

#define CTRL5_USB2_SIDDQ

#define CTRL7_USB2_REFCLKSEL_MASK
#define CTRL7_USB2_REFCLKSEL_ABB
#define CTRL7_USB2_REFCLKSEL_PAD

#define CFG50_USB3_PHY_TEST_POWERDOWN

#define CFG54_USB31PHY_CR_ADDR_MASK

#define CFG54_USB3PHY_REF_USE_PAD
#define CFG54_PHY0_PMA_PWR_STABLE
#define CFG54_PHY0_PCS_PWR_STABLE
#define CFG54_USB31PHY_CR_ACK
#define CFG54_USB31PHY_CR_WR_EN
#define CFG54_USB31PHY_CR_SEL
#define CFG54_USB31PHY_CR_RD_EN
#define CFG54_USB31PHY_CR_CLK
#define CFG54_USB3_PHY0_ANA_PWR_EN

#define CFG58_USB31PHY_CR_DATA_MASK

#define CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN

#define CFGA0_VAUX_RESET
#define CFGA0_USB31C_RESET
#define CFGA0_USB2PHY_REFCLK_SELECT
#define CFGA0_USB3PHY_RESET
#define CFGA0_USB2PHY_POR

#define INTR_EN_XA_TIMEOUT_EVT_EN
#define INTR_EN_XA_ACK_EVT_EN

#define CLK_RST_TCA_REF_CLK_EN
#define CLK_RST_SUSPEND_CLK_EN

#define GCFG_ROLE_HSTDEV
#define GCFG_OP_MODE
#define GCFG_OP_MODE_CTRL_SYNC_MODE

#define TCPC_VALID
#define TCPC_LOW_POWER_EN
#define TCPC_MUX_CONTROL_MASK
#define TCPC_MUX_CONTROL_USB31

#define SYSMODE_CFG_TYPEC_DISABLE

#define VBUS_CTRL_POWERPRESENT_OVERRD
#define VBUS_CTRL_VBUSVALID_OVERRD

#define KIRIN970_USB_DEFAULT_PHY_PARAM
#define KIRIN970_USB_DEFAULT_PHY_VBOOST

#define TX_VBOOST_LVL_REG
#define TX_VBOOST_LVL_START
#define TX_VBOOST_LVL_ENABLE

struct hi3670_priv {};

static int hi3670_phy_cr_clk(struct regmap *usb31misc)
{}

static int hi3670_phy_cr_set_sel(struct regmap *usb31misc)
{}

static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
{}

static int hi3670_phy_cr_wait_ack(struct regmap *usb31misc)
{}

static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
{}

static int hi3670_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
{}

static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
{}

static int hi3670_phy_set_params(struct hi3670_priv *priv)
{}

static bool hi3670_is_abbclk_selected(struct hi3670_priv *priv)
{}

static int hi3670_config_phy_clock(struct hi3670_priv *priv)
{}

static int hi3670_config_tca(struct hi3670_priv *priv)
{}

static int hi3670_phy_init(struct phy *phy)
{}

static int hi3670_phy_exit(struct phy *phy)
{}

static const struct phy_ops hi3670_phy_ops =;

static int hi3670_phy_probe(struct platform_device *pdev)
{}

static const struct of_device_id hi3670_phy_of_match[] =;
MODULE_DEVICE_TABLE(of, hi3670_phy_of_match);

static struct platform_driver hi3670_phy_driver =;
module_platform_driver();

MODULE_AUTHOR();
MODULE_LICENSE();
MODULE_DESCRIPTION();