linux/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v4_20.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V4_20_H_
#define QCOM_PHY_QMP_QSERDES_TXRX_V4_20_H_

/* Only for QMP V4_20 PHY - TX registers */
#define QSERDES_V4_20_TX_LANE_MODE_1
#define QSERDES_V4_20_TX_LANE_MODE_2
#define QSERDES_V4_20_TX_LANE_MODE_3
#define QSERDES_V4_20_TX_VMODE_CTRL1
#define QSERDES_V4_20_TX_PI_QEC_CTRL

/* Only for QMP V4_20 PHY - RX registers */
#define QSERDES_V4_20_RX_FO_GAIN_RATE2
#define QSERDES_V4_20_RX_UCDR_PI_CONTROLS
#define QSERDES_V4_20_RX_AUX_DATA_TCOARSE_TFINE
#define QSERDES_V4_20_RX_DFE_3
#define QSERDES_V4_20_RX_DFE_DAC_ENABLE1
#define QSERDES_V4_20_RX_DFE_DAC_ENABLE2
#define QSERDES_V4_20_RX_VGA_CAL_CNTRL2
#define QSERDES_V4_20_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1
#define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B1
#define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B2
#define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B3
#define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B4
#define QSERDES_V4_20_RX_RX_MODE_RATE2_B0
#define QSERDES_V4_20_RX_RX_MODE_RATE2_B1
#define QSERDES_V4_20_RX_RX_MODE_RATE2_B2
#define QSERDES_V4_20_RX_RX_MODE_RATE2_B3
#define QSERDES_V4_20_RX_RX_MODE_RATE2_B4
#define QSERDES_V4_20_RX_RX_MODE_RATE3_B0
#define QSERDES_V4_20_RX_RX_MODE_RATE3_B1
#define QSERDES_V4_20_RX_RX_MODE_RATE3_B2
#define QSERDES_V4_20_RX_RX_MODE_RATE3_B3
#define QSERDES_V4_20_RX_RX_MODE_RATE3_B4
#define QSERDES_V4_20_RX_PHPRE_CTRL
#define QSERDES_V4_20_RX_DFE_CTLE_POST_CAL_OFFSET
#define QSERDES_V4_20_RX_MARG_COARSE_CTRL2

#endif