#ifndef __INTEL_GT__
#define __INTEL_GT__
#include "intel_engine_types.h"
#include "intel_gt_types.h"
#include "intel_reset.h"
struct drm_i915_private;
struct drm_printer;
#define IS_GFX_GT_IP_RANGE(gt, from, until) …
#define IS_MEDIA_GT_IP_RANGE(gt, from, until) …
#define IS_GFX_GT_IP_STEP(gt, ipver, from, until) …
#define IS_MEDIA_GT_IP_STEP(gt, ipver, from, until) …
#define GT_TRACE(gt, fmt, ...) …
static inline bool gt_is_root(struct intel_gt *gt)
{ … }
bool intel_gt_needs_wa_16018031267(struct intel_gt *gt);
bool intel_gt_needs_wa_22016122933(struct intel_gt *gt);
#define NEEDS_FASTCOLOR_BLT_WABB(engine) …
static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
{ … }
static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
{ … }
static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
{ … }
static inline struct intel_gt *gsc_uc_to_gt(struct intel_gsc_uc *gsc_uc)
{ … }
static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
{ … }
static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc)
{ … }
static inline struct intel_guc *gt_to_guc(struct intel_gt *gt)
{ … }
void intel_gt_common_init_early(struct intel_gt *gt);
int intel_root_gt_init_early(struct drm_i915_private *i915);
int intel_gt_assign_ggtt(struct intel_gt *gt);
int intel_gt_init_mmio(struct intel_gt *gt);
int __must_check intel_gt_init_hw(struct intel_gt *gt);
int intel_gt_init(struct intel_gt *gt);
void intel_gt_driver_register(struct intel_gt *gt);
void intel_gt_driver_unregister(struct intel_gt *gt);
void intel_gt_driver_remove(struct intel_gt *gt);
void intel_gt_driver_release(struct intel_gt *gt);
void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
void intel_gt_check_and_clear_faults(struct intel_gt *gt);
i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt);
void intel_gt_clear_error_registers(struct intel_gt *gt,
intel_engine_mask_t engine_mask);
void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
void intel_gt_chipset_flush(struct intel_gt *gt);
static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
enum intel_gt_scratch_field field)
{ … }
static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
{ … }
static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
{ … }
int intel_gt_probe_all(struct drm_i915_private *i915);
int intel_gt_tiles_init(struct drm_i915_private *i915);
#define for_each_gt(gt__, i915__, id__) …
#define for_each_engine(engine__, gt__, id__) …
#define for_each_engine_masked(engine__, gt__, mask__, tmp__) …
void intel_gt_info_print(const struct intel_gt_info *info,
struct drm_printer *p);
void intel_gt_watchdog_work(struct work_struct *work);
enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
struct drm_i915_gem_object *obj,
bool always_coherent);
void intel_gt_bind_context_set_ready(struct intel_gt *gt);
void intel_gt_bind_context_set_unready(struct intel_gt *gt);
bool intel_gt_is_bind_context_ready(struct intel_gt *gt);
static inline void intel_gt_set_wedged_async(struct intel_gt *gt)
{ … }
#endif