#ifndef __INTEL_PCH__
#define __INTEL_PCH__
struct drm_i915_private;
enum intel_pch { … };
#define INTEL_PCH_DEVICE_ID_MASK …
#define INTEL_PCH_IBX_DEVICE_ID_TYPE …
#define INTEL_PCH_CPT_DEVICE_ID_TYPE …
#define INTEL_PCH_PPT_DEVICE_ID_TYPE …
#define INTEL_PCH_LPT_DEVICE_ID_TYPE …
#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE …
#define INTEL_PCH_WPT_DEVICE_ID_TYPE …
#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE …
#define INTEL_PCH_SPT_DEVICE_ID_TYPE …
#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE …
#define INTEL_PCH_KBP_DEVICE_ID_TYPE …
#define INTEL_PCH_CNP_DEVICE_ID_TYPE …
#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE …
#define INTEL_PCH_CMP_DEVICE_ID_TYPE …
#define INTEL_PCH_CMP2_DEVICE_ID_TYPE …
#define INTEL_PCH_CMP_V_DEVICE_ID_TYPE …
#define INTEL_PCH_ICP_DEVICE_ID_TYPE …
#define INTEL_PCH_ICP2_DEVICE_ID_TYPE …
#define INTEL_PCH_MCC_DEVICE_ID_TYPE …
#define INTEL_PCH_TGP_DEVICE_ID_TYPE …
#define INTEL_PCH_TGP2_DEVICE_ID_TYPE …
#define INTEL_PCH_JSP_DEVICE_ID_TYPE …
#define INTEL_PCH_ADP_DEVICE_ID_TYPE …
#define INTEL_PCH_ADP2_DEVICE_ID_TYPE …
#define INTEL_PCH_ADP3_DEVICE_ID_TYPE …
#define INTEL_PCH_ADP4_DEVICE_ID_TYPE …
#define INTEL_PCH_P2X_DEVICE_ID_TYPE …
#define INTEL_PCH_P3X_DEVICE_ID_TYPE …
#define INTEL_PCH_QEMU_DEVICE_ID_TYPE …
#define INTEL_PCH_TYPE(dev_priv) …
#define INTEL_PCH_ID(dev_priv) …
#define HAS_PCH_DG2(dev_priv) …
#define HAS_PCH_ADP(dev_priv) …
#define HAS_PCH_DG1(dev_priv) …
#define HAS_PCH_TGP(dev_priv) …
#define HAS_PCH_ICP(dev_priv) …
#define HAS_PCH_CNP(dev_priv) …
#define HAS_PCH_SPT(dev_priv) …
#define HAS_PCH_LPT(dev_priv) …
#define HAS_PCH_LPT_LP(dev_priv) …
#define HAS_PCH_LPT_H(dev_priv) …
#define HAS_PCH_CPT(dev_priv) …
#define HAS_PCH_IBX(dev_priv) …
#define HAS_PCH_NOP(dev_priv) …
#define HAS_PCH_SPLIT(dev_priv) …
void intel_detect_pch(struct drm_i915_private *dev_priv);
#endif