/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017, The Linux Foundation. All rights reserved. */ #ifndef QCOM_PHY_QMP_PCS_V3_H_ #define QCOM_PHY_QMP_PCS_V3_H_ /* Only for QMP V3 PHY - PCS registers */ #define QPHY_V3_PCS_SW_RESET … #define QPHY_V3_PCS_POWER_DOWN_CONTROL … #define QPHY_V3_PCS_START_CONTROL … #define QPHY_V3_PCS_TXMGN_V0 … #define QPHY_V3_PCS_TXMGN_V1 … #define QPHY_V3_PCS_TXMGN_V2 … #define QPHY_V3_PCS_TXMGN_V3 … #define QPHY_V3_PCS_TXMGN_V4 … #define QPHY_V3_PCS_TXMGN_LS … #define QPHY_V3_PCS_TXDEEMPH_M6DB_V0 … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0 … #define QPHY_V3_PCS_TXDEEMPH_M6DB_V1 … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_V1 … #define QPHY_V3_PCS_TXDEEMPH_M6DB_V2 … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_V2 … #define QPHY_V3_PCS_TXDEEMPH_M6DB_V3 … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_V3 … #define QPHY_V3_PCS_TXDEEMPH_M6DB_V4 … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_V4 … #define QPHY_V3_PCS_TXDEEMPH_M6DB_LS … #define QPHY_V3_PCS_TXDEEMPH_M3P5DB_LS … #define QPHY_V3_PCS_ENDPOINT_REFCLK_DRIVE … #define QPHY_V3_PCS_RX_IDLE_DTCT_CNTRL … #define QPHY_V3_PCS_RATE_SLEW_CNTRL … #define QPHY_V3_PCS_POWER_STATE_CONFIG1 … #define QPHY_V3_PCS_POWER_STATE_CONFIG2 … #define QPHY_V3_PCS_POWER_STATE_CONFIG3 … #define QPHY_V3_PCS_POWER_STATE_CONFIG4 … #define QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_L … #define QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_H … #define QPHY_V3_PCS_RCVR_DTCT_DLY_U3_L … #define QPHY_V3_PCS_RCVR_DTCT_DLY_U3_H … #define QPHY_V3_PCS_LOCK_DETECT_CONFIG1 … #define QPHY_V3_PCS_LOCK_DETECT_CONFIG2 … #define QPHY_V3_PCS_LOCK_DETECT_CONFIG3 … #define QPHY_V3_PCS_TSYNC_RSYNC_TIME … #define QPHY_V3_PCS_SIGDET_LOW_2_IDLE_TIME … #define QPHY_V3_PCS_BEACON_2_IDLE_TIME_L … #define QPHY_V3_PCS_BEACON_2_IDLE_TIME_H … #define QPHY_V3_PCS_PWRUP_RESET_DLY_TIME_SYSCLK … #define QPHY_V3_PCS_PWRUP_RESET_DLY_TIME_AUXCLK … #define QPHY_V3_PCS_LP_WAKEUP_DLY_TIME_AUXCLK … #define QPHY_V3_PCS_PLL_LOCK_CHK_DLY_TIME … #define QPHY_V3_PCS_LFPS_DET_HIGH_COUNT_VAL … #define QPHY_V3_PCS_LFPS_TX_ECSTART_EQTLOCK … #define QPHY_V3_PCS_LFPS_TX_END_CNT_P2U3_START … #define QPHY_V3_PCS_RXEQTRAINING_WAIT_TIME … #define QPHY_V3_PCS_RXEQTRAINING_RUN_TIME … #define QPHY_V3_PCS_TXONESZEROS_RUN_LENGTH … #define QPHY_V3_PCS_FLL_CNTRL1 … #define QPHY_V3_PCS_FLL_CNTRL2 … #define QPHY_V3_PCS_FLL_CNT_VAL_L … #define QPHY_V3_PCS_FLL_CNT_VAL_H_TOL … #define QPHY_V3_PCS_FLL_MAN_CODE … #define QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL … #define QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR … #define QPHY_V3_PCS_ARCVR_DTCT_EN_PERIOD … #define QPHY_V3_PCS_ARCVR_DTCT_CM_DLY … #define QPHY_V3_PCS_ALFPS_DEGLITCH_VAL … #define QPHY_V3_PCS_INSIG_SW_CTRL1 … #define QPHY_V3_PCS_INSIG_SW_CTRL2 … #define QPHY_V3_PCS_INSIG_SW_CTRL3 … #define QPHY_V3_PCS_INSIG_MX_CTRL1 … #define QPHY_V3_PCS_INSIG_MX_CTRL2 … #define QPHY_V3_PCS_INSIG_MX_CTRL3 … #define QPHY_V3_PCS_OUTSIG_SW_CTRL1 … #define QPHY_V3_PCS_OUTSIG_MX_CTRL1 … #define QPHY_V3_PCS_CLK_DEBUG_BYPASS_CTRL … #define QPHY_V3_PCS_TEST_CONTROL … #define QPHY_V3_PCS_TEST_CONTROL2 … #define QPHY_V3_PCS_TEST_CONTROL3 … #define QPHY_V3_PCS_TEST_CONTROL4 … #define QPHY_V3_PCS_TEST_CONTROL5 … #define QPHY_V3_PCS_TEST_CONTROL6 … #define QPHY_V3_PCS_TEST_CONTROL7 … #define QPHY_V3_PCS_COM_RESET_CONTROL … #define QPHY_V3_PCS_BIST_CTRL … #define QPHY_V3_PCS_PRBS_POLY0 … #define QPHY_V3_PCS_PRBS_POLY1 … #define QPHY_V3_PCS_PRBS_SEED0 … #define QPHY_V3_PCS_PRBS_SEED1 … #define QPHY_V3_PCS_FIXED_PAT_CTRL … #define QPHY_V3_PCS_FIXED_PAT0 … #define QPHY_V3_PCS_FIXED_PAT1 … #define QPHY_V3_PCS_FIXED_PAT2 … #define QPHY_V3_PCS_FIXED_PAT3 … #define QPHY_V3_PCS_COM_CLK_SWITCH_CTRL … #define QPHY_V3_PCS_ELECIDLE_DLY_SEL … #define QPHY_V3_PCS_SPARE1 … #define QPHY_V3_PCS_BIST_CHK_ERR_CNT_L_STATUS … #define QPHY_V3_PCS_BIST_CHK_ERR_CNT_H_STATUS … #define QPHY_V3_PCS_BIST_CHK_STATUS … #define QPHY_V3_PCS_LFPS_RXTERM_IRQ_SOURCE_STATUS … #define QPHY_V3_PCS_PCS_STATUS … #define QPHY_V3_PCS_PCS_STATUS2 … #define QPHY_V3_PCS_PCS_STATUS3 … #define QPHY_V3_PCS_COM_RESET_STATUS … #define QPHY_V3_PCS_OSC_DTCT_STATUS … #define QPHY_V3_PCS_REVISION_ID0 … #define QPHY_V3_PCS_REVISION_ID1 … #define QPHY_V3_PCS_REVISION_ID2 … #define QPHY_V3_PCS_REVISION_ID3 … #define QPHY_V3_PCS_DEBUG_BUS_0_STATUS … #define QPHY_V3_PCS_DEBUG_BUS_1_STATUS … #define QPHY_V3_PCS_DEBUG_BUS_2_STATUS … #define QPHY_V3_PCS_DEBUG_BUS_3_STATUS … #define QPHY_V3_PCS_LP_WAKEUP_DLY_TIME_AUXCLK_MSB … #define QPHY_V3_PCS_OSC_DTCT_ACTIONS … #define QPHY_V3_PCS_SIGDET_CNTRL … #define QPHY_V3_PCS_IDAC_CAL_CNTRL … #define QPHY_V3_PCS_CMN_ACK_OUT_SEL … #define QPHY_V3_PCS_PLL_LOCK_CHK_DLY_TIME_SYSCLK … #define QPHY_V3_PCS_AUTONOMOUS_MODE_STATUS … #define QPHY_V3_PCS_ENDPOINT_REFCLK_CNTRL … #define QPHY_V3_PCS_EPCLK_PRE_PLL_LOCK_DLY_SYSCLK … #define QPHY_V3_PCS_EPCLK_PRE_PLL_LOCK_DLY_AUXCLK … #define QPHY_V3_PCS_EPCLK_DLY_COUNT_VAL_L … #define QPHY_V3_PCS_EPCLK_DLY_COUNT_VAL_H … #define QPHY_V3_PCS_RX_SIGDET_LVL … #define QPHY_V3_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB … #define QPHY_V3_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB … #define QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL2 … #define QPHY_V3_PCS_RXTERMINATION_DLY_SEL … #define QPHY_V3_PCS_LFPS_PER_TIMER_VAL … #define QPHY_V3_PCS_SIGDET_STARTUP_TIMER_VAL … #define QPHY_V3_PCS_LOCK_DETECT_CONFIG4 … #define QPHY_V3_PCS_RX_SIGDET_DTCT_CNTRL … #define QPHY_V3_PCS_PCS_STATUS4 … #define QPHY_V3_PCS_PCS_STATUS4_CLEAR … #define QPHY_V3_PCS_DEC_ERROR_COUNT_STATUS … #define QPHY_V3_PCS_COMMA_POS_STATUS … #define QPHY_V3_PCS_REFGEN_REQ_CONFIG1 … #define QPHY_V3_PCS_REFGEN_REQ_CONFIG2 … #define QPHY_V3_PCS_REFGEN_REQ_CONFIG3 … #endif
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