// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, The Linux Foundation. All rights reserved. */ #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/regulator/consumer.h> #include <linux/reset.h> #include <linux/slab.h> #include <ufs/unipro.h> #include "phy-qcom-qmp-common.h" #include "phy-qcom-qmp.h" #include "phy-qcom-qmp-pcs-ufs-v2.h" #include "phy-qcom-qmp-pcs-ufs-v3.h" #include "phy-qcom-qmp-pcs-ufs-v4.h" #include "phy-qcom-qmp-pcs-ufs-v5.h" #include "phy-qcom-qmp-pcs-ufs-v6.h" #include "phy-qcom-qmp-qserdes-txrx-ufs-v6.h" /* QPHY_PCS_READY_STATUS bit */ #define PCS_READY … #define PHY_INIT_COMPLETE_TIMEOUT … #define NUM_OVERLAY … /* set of registers with offsets different per-PHY */ enum qphy_reg_layout { … }; static const unsigned int ufsphy_v2_regs_layout[QPHY_LAYOUT_SIZE] = …; static const unsigned int ufsphy_v3_regs_layout[QPHY_LAYOUT_SIZE] = …; static const unsigned int ufsphy_v4_regs_layout[QPHY_LAYOUT_SIZE] = …; static const unsigned int ufsphy_v5_regs_layout[QPHY_LAYOUT_SIZE] = …; static const unsigned int ufsphy_v6_regs_layout[QPHY_LAYOUT_SIZE] = …; static const struct qmp_phy_init_tbl msm8996_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl msm8996_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl msm8996_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sc7280_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sc7280_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sc7280_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sc7280_ufsphy_hs_g4_rx[] = …; static const struct qmp_phy_init_tbl sm6115_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm6115_ufsphy_hs_b_serdes[] = …; static const struct qmp_phy_init_tbl sm6115_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sm6115_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm6115_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sdm845_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sdm845_ufsphy_hs_b_serdes[] = …; static const struct qmp_phy_init_tbl sdm845_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sdm845_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sdm845_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm7150_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm7150_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_hs_b_serdes[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_hs_g4_tx[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_hs_g4_rx[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm8150_ufsphy_hs_g4_pcs[] = …; static const struct qmp_phy_init_tbl sm8250_ufsphy_hs_g4_tx[] = …; static const struct qmp_phy_init_tbl sm8250_ufsphy_hs_g4_rx[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_hs_b_serdes[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_g4_tx[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_g4_rx[] = …; static const struct qmp_phy_init_tbl sm8350_ufsphy_g4_pcs[] = …; static const struct qmp_phy_init_tbl sm8475_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm8475_ufsphy_g4_serdes[] = …; static const struct qmp_phy_init_tbl sm8475_ufsphy_g4_pcs[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_hs_b_serdes[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g4_serdes[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g5_serdes[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g4_tx[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g4_rx[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g5_rx[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g4_pcs[] = …; static const struct qmp_phy_init_tbl sm8550_ufsphy_g5_pcs[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_serdes[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_tx[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_rx[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_pcs[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_g4_pcs[] = …; static const struct qmp_phy_init_tbl sm8650_ufsphy_g5_pcs[] = …; struct qmp_ufs_offsets { … }; struct qmp_phy_cfg_tbls { … }; /* struct qmp_phy_cfg - per-PHY initialization config */ struct qmp_phy_cfg { … }; struct qmp_ufs { … }; static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) { … } static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val) { … } /* list of regulators */ static const char * const qmp_phy_vreg_l[] = …; static const struct qmp_ufs_offsets qmp_ufs_offsets = …; static const struct qmp_ufs_offsets qmp_ufs_offsets_v6 = …; static const struct qmp_phy_cfg msm8996_ufsphy_cfg = …; static const struct qmp_phy_cfg sa8775p_ufsphy_cfg = …; static const struct qmp_phy_cfg sc7280_ufsphy_cfg = …; static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = …; static const struct qmp_phy_cfg sdm845_ufsphy_cfg = …; static const struct qmp_phy_cfg sm6115_ufsphy_cfg = …; static const struct qmp_phy_cfg sm7150_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8150_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8250_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8350_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8450_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8475_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8550_ufsphy_cfg = …; static const struct qmp_phy_cfg sm8650_ufsphy_cfg = …; static void qmp_ufs_serdes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls) { … } static void qmp_ufs_lanes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls) { … } static void qmp_ufs_pcs_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls) { … } static int qmp_ufs_get_gear_overlay(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) { … } static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) { … } static int qmp_ufs_com_init(struct qmp_ufs *qmp) { … } static int qmp_ufs_com_exit(struct qmp_ufs *qmp) { … } static int qmp_ufs_init(struct phy *phy) { … } static int qmp_ufs_power_on(struct phy *phy) { … } static int qmp_ufs_power_off(struct phy *phy) { … } static int qmp_ufs_exit(struct phy *phy) { … } static int qmp_ufs_enable(struct phy *phy) { … } static int qmp_ufs_disable(struct phy *phy) { … } static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode) { … } static const struct phy_ops qcom_qmp_ufs_phy_ops = …; static int qmp_ufs_vreg_init(struct qmp_ufs *qmp) { … } static int qmp_ufs_clk_init(struct qmp_ufs *qmp) { … } static void qmp_ufs_clk_release_provider(void *res) { … } #define UFS_SYMBOL_CLOCKS … static int qmp_ufs_register_clocks(struct qmp_ufs *qmp, struct device_node *np) { … } static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np) { … } static int qmp_ufs_parse_dt(struct qmp_ufs *qmp) { … } static int qmp_ufs_probe(struct platform_device *pdev) { … } static const struct of_device_id qmp_ufs_of_match_table[] = …; MODULE_DEVICE_TABLE(of, qmp_ufs_of_match_table); static struct platform_driver qmp_ufs_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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