// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, 2020, The Linux Foundation. All rights reserved. * Copyright (c) 2021, Linaro Ltd. */ #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> #include <linux/phy/phy.h> #include <linux/phy/phy-dp.h> #include <linux/platform_device.h> #include <linux/regulator/consumer.h> #include <linux/reset.h> #include <linux/slab.h> #include <dt-bindings/phy/phy.h> #include "phy-qcom-qmp-dp-phy.h" #include "phy-qcom-qmp-qserdes-com-v4.h" #include "phy-qcom-qmp-qserdes-com-v6.h" /* EDP_PHY registers */ #define DP_PHY_CFG … #define DP_PHY_CFG_1 … #define DP_PHY_PD_CTL … #define DP_PHY_MODE … #define DP_PHY_AUX_CFG0 … #define DP_PHY_AUX_CFG1 … #define DP_PHY_AUX_CFG2 … #define DP_PHY_AUX_CFG3 … #define DP_PHY_AUX_CFG4 … #define DP_PHY_AUX_CFG5 … #define DP_PHY_AUX_CFG6 … #define DP_PHY_AUX_CFG7 … #define DP_PHY_AUX_CFG8 … #define DP_PHY_AUX_CFG9 … #define DP_PHY_AUX_INTERRUPT_MASK … #define DP_PHY_VCO_DIV … #define DP_PHY_TX0_TX1_LANE_CTL … #define DP_PHY_TX2_TX3_LANE_CTL … #define DP_PHY_STATUS … /* LANE_TXn registers */ #define TXn_CLKBUF_ENABLE … #define TXn_TX_EMP_POST1_LVL … #define TXn_TX_DRV_LVL … #define TXn_TX_DRV_LVL_OFFSET … #define TXn_RESET_TSYNC_EN … #define TXn_LDO_CONFIG … #define TXn_TX_BAND … #define TXn_RES_CODE_LANE_OFFSET_TX0 … #define TXn_RES_CODE_LANE_OFFSET_TX1 … #define TXn_TRANSCEIVER_BIAS_EN … #define TXn_HIGHZ_DRVR_EN … #define TXn_TX_POL_INV … #define TXn_LANE_MODE_1 … #define TXn_TRAN_DRVR_EMP_EN … struct qcom_edp_swing_pre_emph_cfg { … }; struct qcom_edp; struct phy_ver_ops { … }; struct qcom_edp_phy_cfg { … }; struct qcom_edp { … }; static const u8 dp_swing_hbr_rbr[4][4] = …; static const u8 dp_pre_emp_hbr_rbr[4][4] = …; static const u8 dp_swing_hbr2_hbr3[4][4] = …; static const u8 dp_pre_emp_hbr2_hbr3[4][4] = …; static const struct qcom_edp_swing_pre_emph_cfg dp_phy_swing_pre_emph_cfg = …; static const u8 edp_swing_hbr_rbr[4][4] = …; static const u8 edp_pre_emp_hbr_rbr[4][4] = …; static const u8 edp_swing_hbr2_hbr3[4][4] = …; static const u8 edp_pre_emp_hbr2_hbr3[4][4] = …; static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = …; static int qcom_edp_phy_init(struct phy *phy) { … } static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configure_opts_dp *dp_opts) { … } static int qcom_edp_phy_configure(struct phy *phy, union phy_configure_opts *opts) { … } static int qcom_edp_configure_ssc(const struct qcom_edp *edp) { … } static int qcom_edp_configure_pll(const struct qcom_edp *edp) { … } static int qcom_edp_set_vco_div(const struct qcom_edp *edp, unsigned long *pixel_freq) { … } static int qcom_edp_phy_power_on_v4(const struct qcom_edp *edp) { … } static int qcom_edp_phy_com_resetsm_cntrl_v4(const struct qcom_edp *edp) { … } static int qcom_edp_com_bias_en_clkbuflr_v4(const struct qcom_edp *edp) { … } static int qcom_edp_com_configure_ssc_v4(const struct qcom_edp *edp) { … } static int qcom_edp_com_configure_pll_v4(const struct qcom_edp *edp) { … } static const struct phy_ver_ops qcom_edp_phy_ops_v4 = …; static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = …; static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = …; static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = …; static int qcom_edp_phy_power_on_v6(const struct qcom_edp *edp) { … } static int qcom_edp_phy_com_resetsm_cntrl_v6(const struct qcom_edp *edp) { … } static int qcom_edp_com_bias_en_clkbuflr_v6(const struct qcom_edp *edp) { … } static int qcom_edp_com_configure_ssc_v6(const struct qcom_edp *edp) { … } static int qcom_edp_com_configure_pll_v6(const struct qcom_edp *edp) { … } static const struct phy_ver_ops qcom_edp_phy_ops_v6 = …; static struct qcom_edp_phy_cfg x1e80100_phy_cfg = …; static int qcom_edp_phy_power_on(struct phy *phy) { … } static int qcom_edp_phy_power_off(struct phy *phy) { … } static int qcom_edp_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) { … } static int qcom_edp_phy_exit(struct phy *phy) { … } static const struct phy_ops qcom_edp_ops = …; /* * Embedded Display Port PLL driver block diagram for branch clocks * * +------------------------------+ * | EDP_VCO_CLK | * | | * | +-------------------+ | * | | (EDP PLL/VCO) | | * | +---------+---------+ | * | v | * | +----------+-----------+ | * | | hsclk_divsel_clk_src | | * | +----------+-----------+ | * +------------------------------+ * | * +---------<---------v------------>----------+ * | | * +--------v----------------+ | * | edp_phy_pll_link_clk | | * | link_clk | | * +--------+----------------+ | * | | * | | * v v * Input to DISPCC block | * for link clk, crypto clk | * and interface clock | * | * | * +--------<------------+-----------------+---<---+ * | | | * +----v---------+ +--------v-----+ +--------v------+ * | vco_divided | | vco_divided | | vco_divided | * | _clk_src | | _clk_src | | _clk_src | * | | | | | | * |divsel_six | | divsel_two | | divsel_four | * +-------+------+ +-----+--------+ +--------+------+ * | | | * v---->----------v-------------<------v * | * +----------+-----------------+ * | edp_phy_pll_vco_div_clk | * +---------+------------------+ * | * v * Input to DISPCC block * for EDP pixel clock * */ static int qcom_edp_dp_pixel_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long qcom_edp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static const struct clk_ops qcom_edp_dp_pixel_clk_ops = …; static int qcom_edp_dp_link_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long qcom_edp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static const struct clk_ops qcom_edp_dp_link_clk_ops = …; static int qcom_edp_clks_register(struct qcom_edp *edp, struct device_node *np) { … } static int qcom_edp_phy_probe(struct platform_device *pdev) { … } static const struct of_device_id qcom_edp_phy_match_table[] = …; MODULE_DEVICE_TABLE(of, qcom_edp_phy_match_table); static struct platform_driver qcom_edp_phy_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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