linux/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_20_H_
#define QCOM_PHY_QMP_PCS_PCIE_V5_20_H_

/* Only for QMP V5_20 PHY - PCIe PCS registers */
#define QPHY_V5_20_PCS_PCIE_POWER_STATE_CONFIG2 …
#define QPHY_V5_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE …
#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 …
#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_ACTIONS …
#define QPHY_V5_20_PCS_PCIE_EQ_CONFIG1 …
#define QPHY_V5_20_PCS_PCIE_PRESET_P10_POST …
#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG2 …
#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG5 …
#define QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN …
#define QPHY_V5_20_PCS_PCIE_RX_MARGINING_CONFIG3 …
#define QPHY_V5_20_PCS_LANE1_INSIG_SW_CTRL2 …
#define QPHY_V5_20_PCS_LANE1_INSIG_MX_CTRL2 …

#endif