linux/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/phy/pcie.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/slab.h>

#include <dt-bindings/phy/phy-qcom-qmp.h>

#include "phy-qcom-qmp-common.h"

#include "phy-qcom-qmp.h"
#include "phy-qcom-qmp-pcs-misc-v3.h"
#include "phy-qcom-qmp-pcs-pcie-v4.h"
#include "phy-qcom-qmp-pcs-pcie-v4_20.h"
#include "phy-qcom-qmp-pcs-pcie-v5.h"
#include "phy-qcom-qmp-pcs-pcie-v5_20.h"
#include "phy-qcom-qmp-pcs-pcie-v6.h"
#include "phy-qcom-qmp-pcs-pcie-v6_20.h"
#include "phy-qcom-qmp-pcie-qhp.h"

#define PHY_INIT_COMPLETE_TIMEOUT

/* set of registers with offsets different per-PHY */
enum qphy_reg_layout {};

static const unsigned int pciephy_v2_regs_layout[QPHY_LAYOUT_SIZE] =;

static const unsigned int pciephy_v3_regs_layout[QPHY_LAYOUT_SIZE] =;

static const unsigned int sdm845_qhp_pciephy_regs_layout[QPHY_LAYOUT_SIZE] =;

static const unsigned int pciephy_v4_regs_layout[QPHY_LAYOUT_SIZE] =;

static const unsigned int pciephy_v5_regs_layout[QPHY_LAYOUT_SIZE] =;

static const unsigned int pciephy_v6_regs_layout[QPHY_LAYOUT_SIZE] =;

static const struct qmp_phy_init_tbl msm8998_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl msm8998_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl msm8998_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq6018_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl ipq6018_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl ipq6018_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl ipq6018_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq6018_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_serdes_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_tx_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_rx_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x1_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x2_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x1_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x1_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl ipq9574_gen3x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qmp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qmp_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qmp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qmp_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qhp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qhp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sdm845_qhp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sc8180x_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sc8180x_qmp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sc8180x_qmp_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sc8180x_qmp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sc8180x_qmp_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x1_pcie_rc_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x2_pcie_rc_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x4_pcie_serdes_4ln_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x1_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x1_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x1_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x1_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sc8280xp_qmp_gen3x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x4_pcie_serdes_4ln_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_ln_shrd_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl x1e80100_qmp_gen4x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x1_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x1_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x1_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x1_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8250_qmp_gen3x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_rc_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_rc_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sdx65_qmp_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sdx65_qmp_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sdx65_qmp_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sdx65_qmp_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sdx65_qmp_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_rc_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_rc_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8350_qmp_gen3x1_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8350_qmp_gen3x1_pcie_rc_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8350_qmp_gen3x2_pcie_rc_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8350_qmp_gen3x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8350_qmp_gen3x2_pcie_rc_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_rc_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_rc_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_ep_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_ep_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen3x2_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen3x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen3x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen3x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen3x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_serdes_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_ln_shrd_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_pcs_tbl[] =;

static const struct qmp_phy_init_tbl sm8550_qmp_gen4x2_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sm8650_qmp_gen4x2_pcie_rx_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_serdes_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_rc_serdes_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_rx_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4_pcie_tx_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4_pcie_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4_pcie_rc_pcs_misc_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_pcs_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x4_pcie_rx_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x4_pcie_pcs_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x4_pcie_serdes_alt_tbl[] =;


static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x4_pcie_rc_serdes_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_ep_serdes_alt_tbl[] =;

static const struct qmp_phy_init_tbl sa8775p_qmp_gen4x2_pcie_ep_pcs_alt_tbl[] =;

struct qmp_pcie_offsets {};

struct qmp_phy_cfg_tbls {};

/* struct qmp_phy_cfg - per-PHY initialization config */
struct qmp_phy_cfg {};

struct qmp_pcie {};

static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
{}

static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)
{}

/* list of clocks required by phy */
static const char * const qmp_pciephy_clk_l[] =;

/* list of regulators */
static const char * const qmp_phy_vreg_l[] =;

static const char * const sm8550_qmp_phy_vreg_l[] =;

/* list of resets */
static const char * const ipq8074_pciephy_reset_l[] =;

static const char * const sdm845_pciephy_reset_l[] =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_qhp =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v2 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v3 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v4x1 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v4x2 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v4_20 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v5 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_ipq9574 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v5_20 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v5_30 =;

static const struct qmp_pcie_offsets qmp_pcie_offsets_v6_20 =;

static const struct qmp_phy_cfg ipq8074_pciephy_cfg =;

static const struct qmp_phy_cfg ipq8074_pciephy_gen3_cfg =;

static const struct qmp_phy_cfg ipq6018_pciephy_cfg =;

static const struct qmp_phy_cfg ipq9574_gen3x1_pciephy_cfg =;

static const struct qmp_phy_cfg ipq9574_gen3x2_pciephy_cfg =;

static const struct qmp_phy_cfg sdm845_qmp_pciephy_cfg =;

static const struct qmp_phy_cfg sdm845_qhp_pciephy_cfg =;

static const struct qmp_phy_cfg sm8250_qmp_gen3x1_pciephy_cfg =;

static const struct qmp_phy_cfg sm8250_qmp_gen3x2_pciephy_cfg =;

static const struct qmp_phy_cfg msm8998_pciephy_cfg =;

static const struct qmp_phy_cfg sc8180x_pciephy_cfg =;

static const struct qmp_phy_cfg sc8280xp_qmp_gen3x1_pciephy_cfg =;

static const struct qmp_phy_cfg sc8280xp_qmp_gen3x2_pciephy_cfg =;

static const struct qmp_phy_cfg sc8280xp_qmp_gen3x4_pciephy_cfg =;

static const struct qmp_phy_cfg sdx55_qmp_pciephy_cfg =;

static const struct qmp_phy_cfg sm8350_qmp_gen3x1_pciephy_cfg =;

static const struct qmp_phy_cfg sm8350_qmp_gen3x2_pciephy_cfg =;

static const struct qmp_phy_cfg sdx65_qmp_pciephy_cfg =;

static const struct qmp_phy_cfg sm8450_qmp_gen3x1_pciephy_cfg =;

static const struct qmp_phy_cfg sm8450_qmp_gen4x2_pciephy_cfg =;

static const struct qmp_phy_cfg sm8550_qmp_gen3x2_pciephy_cfg =;

static const struct qmp_phy_cfg sm8550_qmp_gen4x2_pciephy_cfg =;

static const struct qmp_phy_cfg sm8650_qmp_gen4x2_pciephy_cfg =;

static const struct qmp_phy_cfg sa8775p_qmp_gen4x2_pciephy_cfg =;

static const struct qmp_phy_cfg sa8775p_qmp_gen4x4_pciephy_cfg =;

static const struct qmp_phy_cfg x1e80100_qmp_gen4x2_pciephy_cfg =;

static const struct qmp_phy_cfg x1e80100_qmp_gen4x4_pciephy_cfg =;

static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
{}

static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
{}

static int qmp_pcie_init(struct phy *phy)
{}

static int qmp_pcie_exit(struct phy *phy)
{}

static int qmp_pcie_power_on(struct phy *phy)
{}

static int qmp_pcie_power_off(struct phy *phy)
{}

static int qmp_pcie_enable(struct phy *phy)
{}

static int qmp_pcie_disable(struct phy *phy)
{}

static int qmp_pcie_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{}

static const struct phy_ops qmp_pcie_phy_ops =;

static int qmp_pcie_vreg_init(struct qmp_pcie *qmp)
{}

static int qmp_pcie_reset_init(struct qmp_pcie *qmp)
{}

static int qmp_pcie_clk_init(struct qmp_pcie *qmp)
{}

static void phy_clk_release_provider(void *res)
{}

/*
 * Register a fixed rate pipe clock.
 *
 * The <s>_pipe_clksrc generated by PHY goes to the GCC that gate
 * controls it. The <s>_pipe_clk coming out of the GCC is requested
 * by the PHY driver for its operations.
 * We register the <s>_pipe_clksrc here. The gcc driver takes care
 * of assigning this <s>_pipe_clksrc as parent to <s>_pipe_clk.
 * Below picture shows this relationship.
 *
 *         +---------------+
 *         |   PHY block   |<<---------------------------------------+
 *         |               |                                         |
 *         |   +-------+   |                   +-----+               |
 *   I/P---^-->|  PLL  |---^--->pipe_clksrc--->| GCC |--->pipe_clk---+
 *    clk  |   +-------+   |                   +-----+
 *         +---------------+
 */
static int phy_pipe_clk_register(struct qmp_pcie *qmp, struct device_node *np)
{}

/*
 * Register a fixed rate PHY aux clock.
 *
 * The <s>_phy_aux_clksrc generated by PHY goes to the GCC that gate
 * controls it. The <s>_phy_aux_clk coming out of the GCC is requested
 * by the PHY driver for its operations.
 * We register the <s>_phy_aux_clksrc here. The gcc driver takes care
 * of assigning this <s>_phy_aux_clksrc as parent to <s>_phy_aux_clk.
 * Below picture shows this relationship.
 *
 *         +---------------+
 *         |   PHY block   |<<---------------------------------------------+
 *         |               |                                               |
 *         |   +-------+   |                      +-----+                  |
 *   I/P---^-->|  PLL  |---^--->phy_aux_clksrc--->| GCC |--->phy_aux_clk---+
 *    clk  |   +-------+   |                      +-----+
 *         +---------------+
 */
static int phy_aux_clk_register(struct qmp_pcie *qmp, struct device_node *np)
{}

static struct clk_hw *qmp_pcie_clk_hw_get(struct of_phandle_args *clkspec, void *data)
{}

static int qmp_pcie_register_clocks(struct qmp_pcie *qmp, struct device_node *np)
{}

static int qmp_pcie_parse_dt_legacy(struct qmp_pcie *qmp, struct device_node *np)
{}

static int qmp_pcie_get_4ln_config(struct qmp_pcie *qmp)
{}

static int qmp_pcie_parse_dt(struct qmp_pcie *qmp)
{}

static int qmp_pcie_probe(struct platform_device *pdev)
{}

static const struct of_device_id qmp_pcie_of_match_table[] =;
MODULE_DEVICE_TABLE(of, qmp_pcie_of_match_table);

static struct platform_driver qmp_pcie_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();