/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*- */ /* * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef _I915_DRV_H_ #define _I915_DRV_H_ #include <uapi/drm/i915_drm.h> #include <linux/pm_qos.h> #include <drm/ttm/ttm_device.h> #include "display/intel_display_limits.h" #include "display/intel_display_core.h" #include "gem/i915_gem_context_types.h" #include "gem/i915_gem_shrinker.h" #include "gem/i915_gem_stolen.h" #include "gt/intel_engine.h" #include "gt/intel_gt_types.h" #include "gt/intel_region_lmem.h" #include "gt/intel_workarounds.h" #include "gt/uc/intel_uc.h" #include "soc/intel_pch.h" #include "i915_drm_client.h" #include "i915_gem.h" #include "i915_gpu_error.h" #include "i915_params.h" #include "i915_perf_types.h" #include "i915_scheduler.h" #include "i915_utils.h" #include "intel_device_info.h" #include "intel_memory_region.h" #include "intel_runtime_pm.h" #include "intel_step.h" #include "intel_uncore.h" struct drm_i915_clock_gating_funcs; struct vlv_s0ix_state; struct intel_pxp; #define GEM_QUIRK_PIN_SWIZZLED_PAGES … /* Data Stolen Memory (DSM) aka "i915 stolen memory" */ struct i915_dsm { … }; struct i915_suspend_saved_registers { … }; #define MAX_L3_SLICES … struct intel_l3_parity { … }; struct i915_gem_mm { … }; struct i915_virtual_gpu { … }; struct i915_selftest_stash { … }; struct drm_i915_private { … }; static inline struct drm_i915_private *to_i915(const struct drm_device *dev) { … } static inline struct drm_i915_private *kdev_to_i915(struct device *kdev) { … } static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) { … } static inline struct intel_gt *to_gt(const struct drm_i915_private *i915) { … } #define rb_to_uabi_engine(rb) … #define for_each_uabi_engine(engine__, i915__) … #define INTEL_INFO(i915) … #define RUNTIME_INFO(i915) … #define DRIVER_CAPS(i915) … #define INTEL_DEVID(i915) … #define IP_VER(ver, rel) … #define GRAPHICS_VER(i915) … #define GRAPHICS_VER_FULL(i915) … #define IS_GRAPHICS_VER(i915, from, until) … #define MEDIA_VER(i915) … #define MEDIA_VER_FULL(i915) … #define IS_MEDIA_VER(i915, from, until) … #define INTEL_REVID(i915) … #define INTEL_GRAPHICS_STEP(__i915) … #define INTEL_MEDIA_STEP(__i915) … #define IS_GRAPHICS_STEP(__i915, since, until) … #define IS_MEDIA_STEP(__i915, since, until) … static __always_inline unsigned int __platform_mask_index(const struct intel_runtime_info *info, enum intel_platform p) { … } static __always_inline unsigned int __platform_mask_bit(const struct intel_runtime_info *info, enum intel_platform p) { … } static inline u32 intel_subplatform(const struct intel_runtime_info *info, enum intel_platform p) { … } static __always_inline bool IS_PLATFORM(const struct drm_i915_private *i915, enum intel_platform p) { … } static __always_inline bool IS_SUBPLATFORM(const struct drm_i915_private *i915, enum intel_platform p, unsigned int s) { … } #define IS_MOBILE(i915) … #define IS_DGFX(i915) … #define IS_I830(i915) … #define IS_I845G(i915) … #define IS_I85X(i915) … #define IS_I865G(i915) … #define IS_I915G(i915) … #define IS_I915GM(i915) … #define IS_I945G(i915) … #define IS_I945GM(i915) … #define IS_I965G(i915) … #define IS_I965GM(i915) … #define IS_G45(i915) … #define IS_GM45(i915) … #define IS_G4X(i915) … #define IS_PINEVIEW(i915) … #define IS_G33(i915) … #define IS_IRONLAKE(i915) … #define IS_IRONLAKE_M(i915) … #define IS_SANDYBRIDGE(i915) … #define IS_IVYBRIDGE(i915) … #define IS_IVB_GT1(i915) … #define IS_VALLEYVIEW(i915) … #define IS_CHERRYVIEW(i915) … #define IS_HASWELL(i915) … #define IS_BROADWELL(i915) … #define IS_SKYLAKE(i915) … #define IS_BROXTON(i915) … #define IS_KABYLAKE(i915) … #define IS_GEMINILAKE(i915) … #define IS_COFFEELAKE(i915) … #define IS_COMETLAKE(i915) … #define IS_ICELAKE(i915) … #define IS_JASPERLAKE(i915) … #define IS_ELKHARTLAKE(i915) … #define IS_TIGERLAKE(i915) … #define IS_ROCKETLAKE(i915) … #define IS_DG1(i915) … #define IS_ALDERLAKE_S(i915) … #define IS_ALDERLAKE_P(i915) … #define IS_DG2(i915) … #define IS_METEORLAKE(i915) … /* * Display code shared by i915 and Xe relies on macros like IS_LUNARLAKE, * so we need to define these even on platforms that the i915 base driver * doesn't support. Ensure the parameter is used in the definition to * avoid 'unused variable' warnings when compiling the shared display code * for i915. */ #define IS_LUNARLAKE(i915) … #define IS_BATTLEMAGE(i915) … #define IS_ARROWLAKE(i915) … #define IS_DG2_G10(i915) … #define IS_DG2_G11(i915) … #define IS_DG2_G12(i915) … #define IS_RAPTORLAKE_S(i915) … #define IS_ALDERLAKE_P_N(i915) … #define IS_RAPTORLAKE_P(i915) … #define IS_RAPTORLAKE_U(i915) … #define IS_HASWELL_EARLY_SDV(i915) … #define IS_BROADWELL_ULT(i915) … #define IS_BROADWELL_ULX(i915) … #define IS_BROADWELL_GT3(i915) … #define IS_HASWELL_ULT(i915) … #define IS_HASWELL_GT3(i915) … #define IS_HASWELL_GT1(i915) … /* ULX machines are also considered ULT. */ #define IS_HASWELL_ULX(i915) … #define IS_SKYLAKE_ULT(i915) … #define IS_SKYLAKE_ULX(i915) … #define IS_KABYLAKE_ULT(i915) … #define IS_KABYLAKE_ULX(i915) … #define IS_SKYLAKE_GT2(i915) … #define IS_SKYLAKE_GT3(i915) … #define IS_SKYLAKE_GT4(i915) … #define IS_KABYLAKE_GT2(i915) … #define IS_KABYLAKE_GT3(i915) … #define IS_COFFEELAKE_ULT(i915) … #define IS_COFFEELAKE_ULX(i915) … #define IS_COFFEELAKE_GT2(i915) … #define IS_COFFEELAKE_GT3(i915) … #define IS_COMETLAKE_ULT(i915) … #define IS_COMETLAKE_ULX(i915) … #define IS_COMETLAKE_GT2(i915) … #define IS_ICL_WITH_PORT_F(i915) … #define IS_TIGERLAKE_UY(i915) … #define IS_LP(i915) … #define IS_GEN9_LP(i915) … #define IS_GEN9_BC(i915) … #define __HAS_ENGINE(engine_mask, id) … #define HAS_ENGINE(gt, id) … #define __ENGINE_INSTANCES_MASK(mask, first, count) … #define ENGINE_INSTANCES_MASK(gt, first, count) … #define RCS_MASK(gt) … #define BCS_MASK(gt) … #define VDBOX_MASK(gt) … #define VEBOX_MASK(gt) … #define CCS_MASK(gt) … #define HAS_MEDIA_RATIO_MODE(i915) … /* * The Gen7 cmdparser copies the scanned buffer to the ggtt for execution * All later gens can run the final buffer from the ppgtt */ #define CMDPARSER_USES_GGTT(i915) … #define HAS_LLC(i915) … #define HAS_SNOOP(i915) … #define HAS_EDRAM(i915) … #define HAS_SECURE_BATCHES(i915) … #define HAS_WT(i915) … #define HWS_NEEDS_PHYSICAL(i915) … #define HAS_LOGICAL_RING_CONTEXTS(i915) … #define HAS_LOGICAL_RING_ELSQ(i915) … #define HAS_EXECLISTS(i915) … #define INTEL_PPGTT(i915) … #define HAS_PPGTT(i915) … #define HAS_FULL_PPGTT(i915) … #define HAS_PAGE_SIZES(i915, sizes) … #define NEEDS_RC6_CTX_CORRUPTION_WA(i915) … /* WaRsDisableCoarsePowerGating:skl,cnl */ #define NEEDS_WaRsDisableCoarsePowerGating(i915) … /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte * rows, which changed the alignment requirements and fence programming. */ #define HAS_128_BYTE_Y_TILING(i915) … #define HAS_RC6(i915) … #define HAS_RC6p(i915) … #define HAS_RC6pp(i915) … #define HAS_RPS(i915) … #define HAS_HECI_PXP(i915) … #define HAS_HECI_GSCFI(i915) … #define HAS_HECI_GSC(i915) … #define HAS_RUNTIME_PM(i915) … #define HAS_64BIT_RELOC(i915) … #define HAS_OA_BPC_REPORTING(i915) … #define HAS_OA_SLICE_CONTRIB_LIMITS(i915) … #define HAS_OAM(i915) … /* * Set this flag, when platform requires 64K GTT page sizes or larger for * device local memory access. */ #define HAS_64K_PAGES(i915) … #define HAS_REGION(i915, id) … #define HAS_LMEM(i915) … #define HAS_EXTRA_GT_LIST(i915) … /* * Platform has the dedicated compression control state for each lmem surfaces * stored in lmem to support the 3D and media compression formats. */ #define HAS_FLAT_CCS(i915) … #define HAS_GT_UC(i915) … #define HAS_POOLED_EU(i915) … #define HAS_GLOBAL_MOCS_REGISTERS(i915) … #define HAS_GMD_ID(i915) … #define HAS_L3_CCS_READ(i915) … /* DPF == dynamic parity feature */ #define HAS_L3_DPF(i915) … #define NUM_L3_SLICES(i915) … #define HAS_GUC_DEPRIVILEGE(i915) … #define HAS_GUC_TLB_INVALIDATION(i915) … #define HAS_3D_PIPELINE(i915) … #define HAS_ONE_EU_PER_FUSE_BIT(i915) … #define HAS_LMEMBAR_SMEM_STOLEN(i915) … #endif
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