/* SPDX-License-Identifier: MIT */ /* * Copyright © 2019 Intel Corporation */ #ifndef INTEL_RING_TYPES_H #define INTEL_RING_TYPES_H #include <linux/atomic.h> #include <linux/kref.h> #include <linux/types.h> /* * Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill, * but keeps the logic simple. Indeed, the whole purpose of this macro is just * to give some inclination as to some of the magic values used in the various * workarounds! */ #define CACHELINE_BYTES … #define CACHELINE_DWORDS … struct i915_vma; struct intel_ring { … }; #endif /* INTEL_RING_TYPES_H */