linux/drivers/gpu/drm/i915/vlv_suspend.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2020 Intel Corporation
 */

#include <linux/string_helpers.h>
#include <linux/kernel.h>

#include <drm/drm_print.h>

#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_trace.h"
#include "i915_utils.h"
#include "intel_clock_gating.h"
#include "vlv_suspend.h"

#include "gt/intel_gt_regs.h"

struct vlv_s0ix_state { … };

/*
 * Save all Gunit registers that may be lost after a D3 and a subsequent
 * S0i[R123] transition. The list of registers needing a save/restore is
 * defined in the VLV2_S0IXRegs document. This documents marks all Gunit
 * registers in the following way:
 * - Driver: saved/restored by the driver
 * - Punit : saved/restored by the Punit firmware
 * - No, w/o marking: no need to save/restore, since the register is R/O or
 *                    used internally by the HW in a way that doesn't depend
 *                    keeping the content across a suspend/resume.
 * - Debug : used for debugging
 *
 * We save/restore all registers marked with 'Driver', with the following
 * exceptions:
 * - Registers out of use, including also registers marked with 'Debug'.
 *   These have no effect on the driver's operation, so we don't save/restore
 *   them to reduce the overhead.
 * - Registers that are fully setup by an initialization function called from
 *   the resume path. For example many clock gating and RPS/RC6 registers.
 * - Registers that provide the right functionality with their reset defaults.
 *
 * TODO: Except for registers that based on the above 3 criteria can be safely
 * ignored, we save/restore all others, practically treating the HW context as
 * a black-box for the driver. Further investigation is needed to reduce the
 * saved/restored registers even further, by following the same 3 criteria.
 */
static void vlv_save_gunit_s0ix_state(struct drm_i915_private *i915)
{ … }

static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *i915)
{ … }

static int vlv_wait_for_pw_status(struct drm_i915_private *i915,
				  u32 mask, u32 val)
{ … }

static int vlv_force_gfx_clock(struct drm_i915_private *i915, bool force_on)
{ … }

static int vlv_allow_gt_wake(struct drm_i915_private *i915, bool allow)
{ … }

static void vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
				  bool wait_for_on)
{ … }

static void vlv_check_no_gt_access(struct drm_i915_private *i915)
{ … }

int vlv_suspend_complete(struct drm_i915_private *dev_priv)
{ … }

int vlv_resume_prepare(struct drm_i915_private *dev_priv, bool rpm_resume)
{ … }

int vlv_suspend_init(struct drm_i915_private *i915)
{ … }

void vlv_suspend_cleanup(struct drm_i915_private *i915)
{ … }