linux/drivers/gpu/drm/i915/vlv_sideband.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2013-2021 Intel Corporation
 */

#include "i915_drv.h"
#include "i915_iosf_mbi.h"
#include "i915_reg.h"
#include "vlv_sideband.h"

#include "display/intel_dpio_phy.h"

/*
 * IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
 * VLV_VLV2_PUNIT_HAS_0.8.docx
 */

/* Standard MMIO read, non-posted */
#define SB_MRD_NP …
/* Standard MMIO write, non-posted */
#define SB_MWR_NP …
/* Private register read, double-word addressing, non-posted */
#define SB_CRRDDA_NP …
/* Private register write, double-word addressing, non-posted */
#define SB_CRWRDA_NP …

static void ping(void *info)
{ … }

static void __vlv_punit_get(struct drm_i915_private *i915)
{ … }

static void __vlv_punit_put(struct drm_i915_private *i915)
{ … }

void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports)
{ … }

void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports)
{ … }

static int vlv_sideband_rw(struct drm_i915_private *i915,
			   u32 devfn, u32 port, u32 opcode,
			   u32 addr, u32 *val)
{ … }

u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr)
{ … }

int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val)
{ … }

u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg)
{ … }

void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val)
{ … }

u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr)
{ … }

u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg)
{ … }

void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val)
{ … }

u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg)
{ … }

void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val)
{ … }

static u32 vlv_dpio_phy_iosf_port(struct drm_i915_private *i915, enum dpio_phy phy)
{ … }

u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg)
{ … }

void vlv_dpio_write(struct drm_i915_private *i915,
		    enum dpio_phy phy, int reg, u32 val)
{ … }

u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg)
{ … }

void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val)
{ … }